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AMC3302: accurancy / bias at zero

Part Number: AMC3302
Other Parts Discussed in Thread: AMC3330

Hello, I have a problem with the design of a current and voltage sensor based on the AMC3300 and AMC3302 ICs. It is about DC sensing in a battery operated high voltage system.The AMC3302 circuit is used to sense the current using voltage drop across a 100 micro Ohm measuring resistor. Unfortunately, I am unable to get a zero value when the load is disconnected, I get a voltage of around 25 micro volts at the output of the AMC3302 and I cannot get a zero at the connected ADC.The AMC3302 circuit is used to sense the current using voltage drop across a 100 micro Ohm measuring resistor. Unfortunately, I am unable to get a zero value when the load is disconnected, I get a voltage of around 25 micro volts at the output of the AMC3302 and I cannot get a zero at the connected ADC. The device requires sensing even very small currents, I can't use a dead band around zero.

For the AMC3300 circuit, the voltage results are without problems



Do you have any advice or idea please?


Best regards
Matej

  • Hello Matej,

    The AMC3302 has a typical input offset voltage of 15uV with maximum offsets of +/-50uV referred to the input.  With a nominal closed-loop gain of 41V/V, the typical output referred offset voltage is 615uV, with maximums of +/-2050uV.  Most customers perform a DC calibration during production with the inputs shorted together to calibrate out this initial offset voltage which is likely what needs to be done in your system too.

    The AMC3330 is a lower-gain product (G=2V/V) and so the input offset is a little less noticeable, but it's still there and will contribute typically +/-50uV of input offset error with maximums of +/-300uV.  

    If you'll share your schematic we can take a look as well to determine if there are optimizations that can be made.  

  • Hello Collin, my schematic is here:  uisense.pdf

    Best results I get if is JP2 closed, thed the output offset is around 20uV, if JP2 open, then output offset raise to around 150uV.

    Best regards

    Matej

  • Hello Matej,

    Thank you for sharing the schematic.  It looks appropriate around the inputs and output connections.  

    JP2 is the only connection for the HGND of IC1 (current measurement channel) back to the "U1N" net which appears to be the common (GND) connection that the inputs to IC1 and IC2 are biased to.  The I1P/I1N inputs to IC1 must be biased to a common-mode voltage within the input common-mode voltage limits (VCM) of U1 for proper operation.  Making sure I1N is at roughly the HGND potential by connecting it to the U1N net will satisfy this requirement.

    Regarding the results, if you're getting an output referred offset of only 20uV with the inputs shorted, then the product is performing better than expected and is well within the typical bounds of +/-50uV of input referred offset (before the 41V/V gain!).  This is as accurate as you can expect this device to perform and you'll need to perform a room-temp calibration to remove the remaining offset voltages.