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Original question:

VFC320: f/V-Converter, supply-voltage confusion

VFC320: F2V comparator threshold

hon-chong ho
Prodigy 10 points
Part Number: VFC320
Other Parts Discussed in Thread: TINA-TI,

Hi,

My question is regarding the frequency to voltage conversion application, with frequency in the 10KHz range and output voltage of 1V full-scale.

The datasheet indicates the comparator at pin10 will register logic "0" at 0V or below, and logic "1" at 1V or above.

The waveform in figure 9 shows crossing of 0V followed by 1V at the falling edge of the input signal.

In my design, because of small signal swing (1.8v), the logic "0" and logic"1" are crossed at the opposite edges of the input wave. Logic "0" is registered at the falling edge, and logic "1" is registered at the rising edge.

Will this be a problem to the one-shot circuit?

And, is there a model I can input to TINA-Ti to simulate?

Thanks

  • +1
    TI__Guru* 93105 points

    Hello Hon-chong,

    It states in the VFC320 F-to-V discussion associated with Figure 9 that "For input signals with amplitudes less than 5V, pin 10 should be biased closer to zero to insure that the input signal at pin 10 crosses the zero threshold." That biasing appears to be key for the comparator to trigger. If your input waveform satisfies that requirement then I would expect it to initiate the V-to-F conversion. 

    The VFC320 does not have a TINA-TI model. It is a legacy product that was introduced before simulation models for such devices were common place.

    Regards, Thomas

    Precision Amplifiers Applications Engineering

  • 0 in reply to Thomas Kuehl
    Prodigy 10 points

    Hi Thomas,

    Thanks for your reply.

    In Figure 4, there are 2 comparators, comparator A at pin 10 and comparator B at pin 5. When the voltage at the one-shot capacitor reach -7.5V, it will shut off the 1mA current source.

    Am I right that to avoid any race condition,  the comparator A needs to detect logic "1" to clear its input to the flipflop before comparator B triggers? Is there any "setup" time?

    Thanks

  • 0 in reply to hon-chong ho
    TI__Guru* 93105 points

    Hello Hon-Choong,

    Unfortunately I have no more information than what the VFC320 datasheet provides, but your assessment of the comparator A needing to detect a logic 1, before comparator B triggers strikes me as correct. The speed of the internal comparators is very fast compared to the overall speed of the VFC function and an intentional setup time is not required. If that were the case, the datasheet would have addressed it.

    Regards, Thomas

    Precision Amplifiers Applications Engineering