Input Buffer for ADC

Hi Shyam,

I am moving this to the high-speed amplifier group. They should be able to help you down-select a specific amplifier for your ADC.

Regards,

Rob

Hi Shaym,

Shyam Daram said:

The RF voltage output in fact swings between +3v to -3v for high impedance loads and +1.8v to -1.8v for 50 ohm , what does this mean ?

This is easy to explain:

The driver of photo receiver has an output impedance of 50R. When you connect the output to a device providing a high ohmic input impedance, you will get the full output voltage swing of +/-3.6V. But if you connect the output to a device providing a 50R input impedance, a 2:1 voltage divider is formed and you will get only the half of +/-3.6V namly +/-1.8V.

In HF circuits 50R cabling is standard. If you want to follow this standard, you will need to take a 50R cable and the input impedance of the following device has to be  50R as well. This will also give you a 2:1 signal decrease.

Whenever you need a cable to transport your HF signal to a remote receiver, you will need to use this 50R method. But when you plan to connect the receiving device directly to the output of your photo receiver, you may be able to omit the cable. And the input impedance may be set to a much higher input impedance.

Kai

Thanks very much for your time in explaining the meaning , have you worked with this kind of peak swing of 3.6V (Vpp), how to interface those kind of swinging outputs to a single ended to differential output opamps ?

one idea strikes to mind is a simple potential divider, but i feel an opamp would be much better choice due to bandwidth involved

i will be waiting for any TI engineers to comment from their application experiences

Hi Shyam,

what is your intended sampling frequency?

Kai

Thanks Kai for the explanation! 

Shyam,

  A fully differential amplifier with a charge bucket filter prior to an ADC would probably be beneficial for the application. We can narrow it down to these amplifiers: 

https://www.ti.com/amplifier-circuit/fully-differential/products.html#p512=300;2000&p511=1;1&p1498=Catalog&sort=p512;desc

  This thread explains the above suggestion which relates to Kai's additional question: 

https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/854234/ads8860-hi-i-have-a-question-about-charge-bucket-filter.

Thank you,
Sima 

Kai,

500 MSPS, better if the ADC has a DDC so that in future i can reduce data load if not required,

Also from theory i understood better if these ADC have a input low pass filter to move the high frequency distrubances

i have seen TI ADCs , one problem is JESD which i have zero knowledge and tough to pick up, so its better the ADC is a DDR output type so that i can handle data easily.

Sima,

Thanks for your suggestions, but here the main problem is making the input to match ADC range

Typical ADC input range is 2Vpp (Full Scale)

so what ever input coming from my device is +/- 1.8V which means 3.6Vpp, this i need to attenuate to a level 1.8Vpp in order to match it to the ADC range 

can you please suggest me a scheme here to it with the list of short listed opamps ?

Shyam,

  You could further attenuate the signal right before the input to the amplifier, but would have to take extra precaution when balancing the paths to the fully differential amplifier (FDA). Or, you could do a FDA attenuator like shown in the THS4551 datasheet Figure 10-5:

Thank you,

Sima