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Failing THS3201

Other Parts Discussed in Thread: THS3201

Hello,

I am currently working on a characterization board with several THS3201, configured in simple voltage follower, inverter or gain of 2 or 3.

Several devices seem to be failing, as I experience on some devices offset higher than 100 mV and huge noise (more than 100 mV p-p), with increase in power consumption as well (up to 100 mA), when the input is grounded, although they still amplify signals when there is any. For some devices, these symptoms only appear a few minutes after power cycling.

The output of the devices feed an analog mux.

I would like to know is there are some likely/classical causes that could explain this specific type of failure... or not (?).

Thanks

  • Hello Olivier,

    The devices could be oscillating, which could appear as an offset or increase in noise, as well as lead to increased power consumption.

    Could you please share your schematic? What resistors are you using in the feedback of the THS3201 for the different gains you mentioned? The THS3201 amplifier is a current feedback amplifier, so the feedback resistor value determines the compensation and stability of the amplifier.

    Also, do you have isolation resistors between the THS3201 and the MUX inputs? The MUX input presents a capacitive load to the amplifier, adding extra phase shift that may be causing the amplifier to become unstable. The MUX datasheet should give some information on the capacitance at the MUX inputs. Refer to Figure 8 of the THS3201 datasheet for a recommended series isolation resistor for a given capacitive load.

  • Normally I used the recommended value for the resistors, found in the datasheet. You can see enclosed the relevant part of my schematic:

    3678.schematic.pdf

    I don't have isolation resistors between the THS3201 and the MUX however. The MUX is an ADG1204 from Analog and from what I can see, it's input capacitance is below 10 pF, which makes sense as it is a high bandwidth MUX. Actually fig. 8 of the THS3201 recommends a 50 ohm resistor for 10 pF load. I am not sure if an isolation resistor is required in this case?

    However, after some investigations, I suspect that a faulty ADG1204 (possibly damaged after some probe handling) might have forced some voltage at its input, therefore forcing up to +/- 15 V at the output of the op amp... Nevertheless, I want to make sure there is nothing wrong in my design that could lead to such failure.

  • Olivier,

    I do see a few potential issues in the design. Have you followed the layout recommendations in the THS3201 datasheet (starts on p.19) and removed any ground/power planes below the inverting input and output pins of the THS3201? Parasitic capacitance at these pins can also lead to amplifier instability. I also see that you have jumpers to select the gain for several of the THS3201 amplifiers. These jumpers are also adding capacitance to the sensitive inverting input node of the amplifiers. If it's possible to do so on your board, I would depopulate the jumper headers and short across with as small as possible 0-ohm SMT resistors. I would also recommend adding at least 20-30ohm resistor in series with amplifier outputs that go to the MUX inputs and see if that has any effect. Unfortunately, it may be difficult to do this on your board.

    Although you run the risk of potential stability issues, I still do not expect such an increase in supply current unless there is a visible, large signal swing apparent at the amplifier outputs (volts, not millivolts), so I suspect there may be another issue. You mentioned earlier that you measure a current draw of up to 100mA. Is that for a single THS3201? If you are able to measure the current draw of individual amplifiers, do you see the increased current draw from all amplifiers or just specific ones? If that is the total current draw from the +/-7.5V supplies, you can also do the following: starting from the last THS3201 in the chain, depopulate each THS3201 iteratively and see which THS3201 is contributing the excess current, if it is not equally divided among the three. Also check the polarity of all the bypass capacitors you have on the +/-7.5V supplies.

  • Thanks for your feedbacks Kristoffer.

    I will implement your recommendations and see if there is any improvement.

    Regarding the parasitic capacitance at the inverting input, I would be very interested to know more. Is it possible to find basic estimation of the parasitic introduced by either a jumper or the ground plane below if there is one? Also, how this parasitic capacitance affect the stability of the op amp (and what would be the maximum safe value for example)? It is not the first time I heard of the parastics introduced by jumpers and how bad they are when it comes to high frequencies, so I would very welcome some actual figures and know exactly starting from what point they can become a concern (same applies to breadboards).

    Regarding the power consumption, the current fluctuation I measure is indeed the total current from the +/- 7.5V supply. I already isolated the 2  faulty op amps on my board. Actually, when I remove the feedback of the faulty op amps (with the jumpers), they go to saturation and the total current draw drops considerably (~ 80-100 mA per op amp!). I will replace these.

    Olivier

  • Hi Olivier,

    I have not seen an estimation of the parasitic introduced by the jumper itself, but my best guess is the pads/vias/traces required for the jumper will introduce maybe ~1-2 pF of parasitic cap at the op amp inverting node. A 0.8mm diameter via on a 1.6mm thick board will have a parasitic of about 0.4-0.5pF. If you take into account that each jumper will have two vias for each side of the jumper when it is closed and add in the pad and trace parasitics and you get a figure in the ~1-2pF range.

    For lower speed amplifiers, this inverting input capacitance is not as big a problem, but for high speed amplifiers such as the THS3201, even this little capacitance can cause stability problems. The following app note discusses the effect of parasitic capacitance at the inverting op amp input: Effects of Parasitic Capacitance in Op Amp Circuits - sloa013. In particular, see the discussion beginning on p.7 and see the frequency response peaking due to 1pF in Figure 10 on p. 13.

    Please let me know how your testing goes.