• State TI Thinks Resolved
  • Locked Locked
  • Replies 11 replies
  • Answers 2 answers
  • Subscribers 49 subscribers
  • Views 408 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

INA149: INA149 Pin Clearance

Arin Cengiz
Prodigy 120 points
Part Number: INA149

Hello,

In INA149 datasheet, I understand that 200V voltage difference can occur between pin 3-pin 4.

For example, pin3 is at 200V with respect to my GND, pin2 is at 195V with respect to my GND and my negative supply is connected to GND or -12V value.

From datasheet, I understand that it is appopriate, however from voltage clearance perspectives, if I apply 200V difference between pin3 and pin4, distance between pin3 and pin4 breaks voltage clearance rule for 200V.

So, how can I be sure that these voltage differences (200V or more) are verified with this devices ( with these pin distances) ?

Best Regards

  • 0
    Guru 140200 points

    Hi Arin,

    what clearance rule do you use?

    You might want to have a look at this here:

    https://www.ti.com/tool/INA149EVM

    Kai

  • 0
    TI__Genius 10850 points

    Hi Arin,

    Input voltage differential and input common mode voltage are two separate entities. 

    The maximum input differential voltage the INA149 can process is limited by the output swing, which is +/-1.5V from either power rail. So if you have +/-12V supplies, the maximum input differential is +/-10.5V. 

    That can be in the presence of a high common mode voltage.

    Let us assume a case where the power supplies are +/-12V. If one input is at 200V and the other is at 195V as you mentioned:

    • the common mode input voltage is 197.5V (this is within the common mode spec of the INA149, so this is okay)
    • and the differential voltage is 200V-195V = 5V (this is within the input/output swing spec of the INA149, so this is okay)

    Hope that helps.

    -Tamara

  • 0 in reply to kai klaas69
    Prodigy 120 points

    Hello,

    In rules I used, for 200V difference between two pads, I need to verify 1.5mm. However in INA149, there is approximately 0.63mm between closest point between pin3 and pin4.

    About this issue, I could not get information from file you sent. Thank you,

    Best regards

  • 0 in reply to Tamara M Alani
    Prodigy 120 points

    Hello,

    As I explained reply above, I need to verify that voltage clearance formula is appropriate between pin3 and pin4. However in your example (this is my case also), there are almost 200V difference between pin3 and pin4 ( It is not between pin3-pin2 ). 

    So, in my design rules, If there are 200V difference between two points or pads etc, almost 1.5mm distance should be placed to guarantee that voltage clearance is okay between these two points. 

    My question is how INA149 pins are okay related to this topic ? 

    Best regards

  • 0 in reply to Arin Cengiz
    Guru 140200 points

    Hi Arin,

    the standard IEC60950 says 0.4mm minimum creepage distance at 200V for low degree of contamination and 0.63mm for higher degree of contamination. This is exactly what my link shows.

    Kai

  • 0 in reply to kai klaas69
    Prodigy 120 points

    Hello,

    From above file you sent, I am being directed this link: https://www.ti.com/tool/INA149EVM :). However, I found the information about IEC-60950. Probably, you mentioned the rule table in attachment, right ?

    Best Regards

  • 0 in reply to Arin Cengiz
    Guru 140200 points

    Hi Arin,

    mains voltage is a different story. When it comes to mains voltage with its heavy transients higher creepage distances are needed.

    Kai

  • 0 in reply to kai klaas69
    Prodigy 120 points

    Hello,

    Okay, my document does not include other rules for clearence so can you share your document or picture that shows rule you used (as I sent) for defining clearance ? 

    Best Regards

  • 0 in reply to Arin Cengiz
    Guru 140200 points

    Hi Arin,

    I only have a German version and I must not publish it because of copyright reasons. But I can give you a link (also in German):

    https://www.mikrocontroller.net/articles/Leiterbahnabst%C3%A4nde

    Kai

  • 0 in reply to kai klaas69
    Prodigy 120 points

    Hello Kai,

    It is also useful for me, thank you.

    Best Regards

  • 0 in reply to Arin Cengiz
    Guru 140200 points

    Hi Arin,

    you can improve the isolation characteristics by coating the printed circuit board with a thin layer of a neutrally curing 1K silicone rubber. We do this since descades without any side effects.

    Kai