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Original question:

PCM9211: Create an SPDIF to i2s to SPDIF converter

PCM9211: understanding output data frame format

shivam tyagi
Prodigy 10 points
Part Number: PCM9211

Tool/software:

Hi,

I wanted to know how the I2S frame will look like at the output of PCM9211 with SPDIF at Input.

Where we are pumping Dolby Encoded data from source like DVD player/Audio precision.( In IEC... format)

 

PCM9211

SPDIF_in -> I2S out

 

Also can you help us with PCM9211 script for above config on the evk board? 

thanks,

  • 0
    TI__Mastermind 22080 points

    Hello,

    Please see section   7.3.8.4 PCM Audio Interface Format   ( In general audio  datasheets  usually have diagrams showing  I2S , LJ or RJ and  ....; ) Here, the first diagram in Figure 7-2 shows I2S format.

    Please refer to the following sections for your set up to get I2S  :

    Table 7-7. DIR Serial Audio Data Output Format Set by RXFMT[2:0]  and 

    7.5.16 DIR Output Data Format Register (address = 2Fh) [reset = 00000100]

    7.5.37 DIT Function Control Register 2/3 (address = 61h) [reset = 00010000]

    7.5.42 AUX Output Port (AUXSCKO/AUXBCKO/AUXLRCKO/AUXDOUT) Source Setting Register (address = 6Ch) [reset = 00000000]

    The only script that I have is attached, if needed,  customers modify it accordingly.

    8228.PCM9211_Init.txt 
    #**************************************
#this script is for SPDIF-->RXIN0-->DIR-->MainOutput, Record sound from SPDIF to PC through TAS1020

#So
#1, Chose RXIN0 to DIR
#2, Active DIR
#3, chose DIR output as Mainoutput's source.

#Also HW modification
#1, Flying to High Level(3.3V) to make sure U7's output is Hi-Z
#or 2, TAS1020 output logic high on P1.2 I2S enable signal. 
#**************************************


#System RST Control
#w 80 40 00
w 80 40 33
w 80 40 C0

#XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting
# XTI CLK source 12.288 and BCK 3.072, LRCK 48k = XTI/512
w 80 31 1A
w 80 33 22
w 80 20 00
w 80 24 00
#ADC clock source is chosen by REG42
w 80 26 81

#XTI Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
w 80 33 22


#*********************************************************
#-------------------------------Start DIR settings---------------------------------------
#REG. 21h, DIR Receivable Incoming Biphase's Sampling Frequency Range Setting
w 80 21 00

#REG. 22h, DIR CLKSTP and VOUT delay
w 80 22 01

#REG. 23h, DIR OCS start up wait time and Process for Parity Error Detection and ERROR Release Wait Time Setting
w 80 23 04

# REG 27h DIR Acceptable fs Range Setting & Mask
w 80 27 00

# REG 2Fh, DIR Output Data Format, 24bit I2S mode
w 80 2F 04

# REG. 30h, DIR Recovered System Clock (SCK) Ratio Setting
w 80 30 02

#REG. 32h, DIR Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
w 80 32 22

#REG 34h DIR Input Biphase Signal Source Select and RXIN01 Coaxial Amplifier
#--PWR down amplifier, Select RXIN2
#w 80 34 C2
#--PWR up amplifier, select RXIN0
w 80 34 00
#--PWR up amplifier, select RXIN1
#w 80 34 01

#REG. 37h, Port Sampling Frequency Calculator Measurement Target Setting, Cal and DIR Fs
w 80 37 00
#REG 38h rd DIR Fs
r 80 38 01
#***********************************************************
#------------------------------------ End DIR settings------------------------------------------


#***********************************************************
#---------------------------------Start  MainOutput Settings--------------------------------------
#MainOutput
#REG. 6Ah, Main Output & AUXOUT Port Control
w 80 6A 00

#REG. 6Bh, Main Output Port (SCKO/BCK/LRCK/DOUT) Source Setting
w 80 6B 11

#REG. 6Dh, MPIO_B & Main Output Port Hi-Z Control
w 80 6D 00
#***********************************************************
#------------------------------------ End MainOutput settings------------------------------------------

# read back all registers to ensure GUI integrity
r 80 20 5E

    Regards,

    Arash

  • 0 in reply to Arash Loloee
    Prodigy 10 points

    Hi Arash , Thank you for the response , my question was more towards what is the content that i2s frame will contain , as my input is spdif and it follows IEC61937 frame format , so I wanted to know will the i2s data_out contain full frame in Pa-Pb-Pc-Pd format or just data without any Pa-Pb or frame header .

  • 0 in reply to shivam tyagi
    TI__Mastermind 22080 points

    Hi Shivam,

    As far as I know, the I2S data is just data without any frame data or anything,

    Regards,

    Arash

  • 0 in reply to Arash Loloee
    Prodigy 10 points

    Hi Arash ,

    Please see page-9 , figure 1 for reference : https://cdn.standards.iteh.ai/samples/101993/f9c9621694de4bdcbc934f16d281bf1d/IEC-61937-1-2021.pdf

    Can you help me understand , if I2s will push only data that means pcm9211 will shelve the "sync_preamble[0-3bits] + vucp[28-31bits]" , that is total shelved bits are 8bits out of 32bits , then the remaining bits are 24bits which is data , but according to the image "Figure 7-12. Latency Time Between Input Biphase and LRCKO/DOUT" , it shows on data_out BMW will be shelved and only 0L or 0R is transmitted , which can be 24bit or 16bit data sample per channel , can you check case1 and case2 in table below and tell if my understanding is correct w.r.t to output data ? what data will be there in case1 in aux and unused bits if I configure the output data sample in 24bits data format instead of 16bit , this 24bit will help me to have the same I2s configuration on the receiver side which can work with both PCM and NPCM inputs , my 2nd question is w.r.t to the change in clock_frequency/sampling rate that will be required when pushing 16bits vs when using 24bit configuration .

    Case Input Data[Encoded frame/NPCM] Output Data
    1 sync_preamble[0-3bits] + aux[4-7bits] + unused[8-11bits] + audio_data[12-27] + vucp[28-31bits] aux+unused+audio_data = 24bits 
    2 sync_preamble[0-3bits] + aux[4-7bits] + unused[8-11bits] + audio_data[12-27] + vucp[28-31bits] audio_data = 16bits

    Thanks,

  • +1 in reply to shivam tyagi
    TI__Mastermind 22080 points

    Hello Shivam,

    I believe the general format that you have for both cases is correct and for case 1, once you push 24 bits, the whole 24bits would be taken by audio data only.

    The difference in clocking can be seen using the following equation:

    BCK=  #of channels * Channel depth * fs 

    So as you change the channel depth or sampling frequency , the BCK requirements changes accordingly.

    Regards,

    Arash

  • 0 in reply to Arash Loloee
    Prodigy 10 points

    Hi Arash ,

    I have received my PCm9211 Evaluation board , Now I am trying to run this script : "SPDIF Record via TAS1020 through RXIN2 in MainOutput.txt"

    I have following questions:

    1. w add reg val (70/80/30 what does it mean & from where i can refer it ?) --> want to understand from where I can get details of device address 70/80/30 , what does 70 or 80 or 30 signify ?
    2. SPDIF Record via TAS1020 through RXIN2 in MainOutput.txt
      >> Using this script we are able to stream PCM samples from Optical fiber (J4) -> I2S out (P7)
      Even read r 80 2D 01:  00 -> Indicated PCM data --> this is correct .

    3. With same script(SPDIF Record via TAS1020 through RXIN2 in MainOutput.txt) setup, If i stream Dolby encoded file (*.ac3)

      I2S out shows 16-bit data (MSB aligned).

      Reading r 80 2D 01: 00 (It can't identify its AC3/ Non-linear PMC) :- Indicated PCM data --> this is not correct , want to understand why reading 2Dh register is giving output as 0 when o/p data is non-pcm , please refer section 7.5.14 which says "ONPCM1: NPCM Port Output Status , 0: PCM data,1: Non-PCM data ".

      Is there any additional config req ?

      Also I am reading PC and PD registers 3Ah and 3Ch , which perfectly shows .ac3 details :

      PC

      r 80 3A 02:
        01 00   --> AC3: OK

      PD
      r 80 3C 02:
        00 30  --> Len 0x3000 bits = 1536Bytes: OK

    4. My last question is like .ac3 is supported , wanted to check if MPEG-2 AAC as well as MPEG-2 aacPlus file formats are also supported ?

    Thank you .

  • +1 in reply to shivam tyagi
    TI__Mastermind 22080 points

    Hi Shivam,

    If I understood your first question, you are wondering were the  IC address is coming: this is set within a register in the device and allows the I2C commands to communicate with multi devices with unique addresses. For this device you can refer to  7.4.4.1 Slave Address

    As far as I know this device , like many of our devices can only  detect nonPCM  but not going to work with nonPCM, you need to decode it to a PCM using another  SoC and send it as TDM or I2S to PCM devices.

    Here is another post as reference.

    https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1246449/pcm9211-if-device-will-automatically-mute-the-dir-after-detecting-non-pcm

    Also it will not support MPGE2.

    Regards,

    Arash