Other Parts Discussed in Thread: LMK04832
Hi Team,
We are designing a board with Multiple RFSOC FPGA in it. To synchronize the clock to the ADC and DAC to all the 4 FPGA's ,We have referred the below attached document,
The clock architecture has a master LMK04832 and 4 slave LMK04832 for each FPGA section. The below image shows the clock architecture
The below excel sheet lists out the input and output frequencies of master and slave LMK04832
I have attached the schematics of the above architecture. May I request you to review the schematics. I also request you to review the terminations at the LMK04832 outputs and also the frequencies using Tics pro tool.
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Regards,
Keerthana