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CDCLVC1104: CDCLVC1104PW troubleshoot

Jonathan Navor
Genius 9165 points
Part Number: CDCLVC1104

Hi Team,

Good day! I am posting this in behalf of the customer.

I have shared the full details of inquiry below:

I’m using CDCLVC1104PW in order to buffer the incoming clock (100MHz-200MHz) from the FPGA (Spartan6) and apply them to four Digital-to-Analog Converters (AD9742ARU). All layout recommendations in the TI datasheet have tried to meet. However, the output values of CDCLVC1104PW are the same and around 60 mv (seems all changes of the input clock are ignored). In addition, supply voltage and high level of input CLK are 3.3V, and an input CLK meets the VHL and VLH correctly.
All output signals of the “clock buffer IC” have the same problem (there is no change in the output pins related to the change in the input signal). In addition, I have tried different input CLK with freq. of 10MHZ, 50MHz, 200MHz, and even I’ve applied 3.3V directly to the input pin (as well as GND) but the output pins are always equal to ‘0’.
The situation does not change even by separating of output pin from the rest of my circuit. 
Please let me know if there is any problem or solution to solve the issue. 
Some pictures of PCB layout, schematic, Input clock, VCC, and output are shown in the following (attached file): 

CDCLVC1104PW Problem.docx

Best regards,

Jonathan

  • 0
    TI__Mastermind 20900 points

    Hello Jonathan,

    thanks for the detailed problem description. I have a few clarification questions:

    1. Have you confirmed VDD and 1G voltage levels at the lead of CDCLVC1104?

    2. Have you probed the input clock directly at the pin 1 of CDCLVC1104?

    3. Can you share the connection schematic between the FPGA and CDCLVC1104?

    4. Is it possible to square the clock coming from the FPGA?

    5. Is that behavior on a single board? if yes, have you tried to exchange the buffer?

    regards,

    Julian 

  • 0 in reply to Julian Hagedorn
    TI__Genius 9165 points

    Hi Julian,

    Here is the customer's answer to your question. Attached in word document.

    CDCLVC1104PW Problem_V2.docx

    Best regards,

    Jonathan

  • 0 in reply to Jonathan Navor
    TI__Mastermind 20900 points

    Hi Jonathan,

    if 10 ICs are failing it seems that there might be a systematic issue.

    Do all 10 IC's have the same top marking? If yes, please order a few samples to check with a different lot.

    Can you share the gerber files or better resolution PCB pictures (all layers)?

    Stupid question: pin 1 of the IC is on pin1 on the PCB?

    Have you tried toggling the 1G pin?

    Regards,

    Julian

  • 0 in reply to Julian Hagedorn
    TI__Genius 9165 points

    Hi Julian,

    Here is the update from the customer.

    The Gerber file of the PCB has been attached. In addition, they are sure about the allocated name of each pin, and the schematic and footprint both are correct.

    CAMtastic1.Cam

    Best regards,

    Jonathan

  • 0 in reply to Jonathan Navor
    TI__Mastermind 20900 points

    Hi Jonathan,

    the gerber files look OK to me. I just don't see where "VCC+3.3V" is connected to (maybe some layers are missing). Anyway, you confirmed that the supply voltage is there, so I assume that this is fine.

    It would be good to try a known good unit (e.g. tested with an EVM) and place it on the PCB. Also place a "bad" unit on the EVM.

    If the bad unit is also not working on the EVM, I would suggest to return the unit(s) for analysis.

    regards,

    Julian