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Original question:

LMK00804B-Q1: Clipped sine-wave input from TCXO

LMK00804B-Q1: Buffer generates a high with 0.45V input voltage - why?

Martin Erler
Prodigy 40 points
Part Number: LMK00804B-Q1
Other Parts Discussed in Thread: LMK00804B

Dear experts,

we got a design were a 38.4MHz TCXO with a 0.95V amplitude is AC decoupled connected to "LVCMOS_CLK".
Buffer is supplied with 3V3.

Its interesting because at buffer output a proper LV-CMOS 38.4MHz signal is available.

I'm a little bit confused why because in datasheet the minimum value for ViH is specified with 2V.

Thanks,
Martin

  • 0
    TI__Expert 7010 points

    Hi Martin, 

    Can you share a schematic of the design? I also wouldn't necessarily expect a 0.95V input swing to be enough to generate a stable output. It's possible that there is some design margin on the part so it has borderline stability, but in general we can't make any performance guarantees beyond what the datasheet recommends. I can check if we have an EVM available to see If I can replicate this behavior, I will get back to you early next week with an update. 

    Regards, 

    Connor 

  • 0 in reply to Connor Lewis
    Prodigy 40 points

    Hi Connor,

    thanks for reply. Its a simple and stupid circuit:


    At the moment I'm more wondering why circuit is generating an output signal.
    In my opinion this is dangerous.

    In next sample status I'll chance / adapt circuit to this:

    What do you think about this solution?
    The 0.95Vpp signal is shiftet to 0.5*VDD and compared with 0.5*VDD (differential input)
    I think this should work in every condition.

    Thanks & regards,

    Martin

  • 0 in reply to Martin Erler
    TI__Expert 7010 points

    Hi Martin, 

    I believe the new circuit will be a better solution with a few minor modifications, see the datasheet recommendation for single ended DC configuration. It is recommended to add a small offset voltage (~ -50 mv) in the biasing between CLK_P and CLK_N to improve reliability and input chatter. 

    Regards, 

    Connor

  • +1 in reply to Connor Lewis
    Prodigy 40 points

    Hi Connor,

    I was thinking about this deviation in resistor divider to bring some, let’s call is hysteresis, in the system.

    This trimming costs additional money (new resistor value or additional resistor in parallel). TXCO and LMK00804B is supplied with same supply, which is monitored by uP. Microcontroller will generate LMK00804B CLK_EN after supply voltage is stable. Up to this point this trimming shouldn't be necessary.

    Today morning I was thinking about this topic again and there is a failure that could justify the additional costs -> TXCO breakdown in an open circuit.
    If TXCO will not die in a stuck at high or low input circuit is on same voltage level and will chatter. Resulting in an output CLK frequency out of range.
    I think this is an argument to invest more money in this circuit.

    Thanks for finding this error case ;-)

    Wish you a nice day!

    Regards,
    Martin