CDCE813-Q1: clock jitter cleaner

Amy Luo

Part Number: CDCE813-Q1
Other Parts Discussed in Thread: CDCE913, CLOCKPRO

Hi team,

One of our customers uses the CDCE813 as a PCLK jitter cleaner with an input frequency of 24MHz.

I know it needs to operate in PLL mode if clock jitter cleaner is used. However, 24MHZ input frequency is less than minimum VCO frequency (70MHz), so need to program the device.

How can I quickly determine the appropriate PLL parameters without an EVM?

The customer asked for the corresponding register configuration, could you help me provide this assistance？

Best Regards,

Amy Luo

over 1 year ago

0 vicente flores prado over 1 year ago

TI__Genius 14921 points

Hi Amy,
You can use CDCE913 EVM if you have one at hand. It's the same die and here you can use CLOCKPRO software. The loop filter parameters will be set automatically.

As mentioned in this past e2e post, CDCE813 the performance isn't too good..

Regards

0 Yuan Tan63 over 1 year ago in reply to vicente flores prado

TI__Expert 3280 points

hi Vicent,

if CDCE813's performance is not good, what's your recommendation, why?

and do we have a guidebook for how to config the registers?

thank you!

B&R

Yuan

0 vicente flores prado over 1 year ago in reply to Yuan Tan63

TI__Genius 14921 points

Hi Yuan,
In this use case, I would recommend customer use a dedicated jitter cleaner such as LMK048xx. The jitter performance of CDCE813 is not great.
In regards to how to configure the register, this snippet is found on page 17 of the device datasheet.

Information on each register is found on page 18.

Regards,

Vicente

0 Amy Luo over 1 year ago in reply to vicente flores prado

TI__Expert 6895 points

Hi Vicente,

Thank you for your response.

The customer's input is 24.576MHZ and the output is 24.576MHZ. How do we configure the PLL parameters using ClockPro?

Best Regards,

Amy

0 Amy Luo over 1 year ago in reply to vicente flores prado

TI__Expert 6895 points

Hi Vicente,

Is the following configuration OK? How does the frequency of the VCO relate to jitter performance?

The frequency of VCO is in the range of 70MHz to 230MHz, P divider and N divider can also be set to 6, 7, 8, 9. Setting which value jitter performance is the best?

Thank you,

Amy

+1 Andrea Vallenilla over 1 year ago in reply to Amy Luo

TI__Genius 10015 points

Hello Amy,

To lower jitter performance, I would suggest you choose the smallest possible value for your N-divider. Therefore, you would want to set the N-divider to 6 if it'll give you the desired VCO frequency.

Vicente will further add about the programming of the CLOCK PRO software by the end of this week once he's back in office.

Best,

Andrea

+1 vicente flores prado over 1 year ago in reply to Amy Luo

TI__Genius 14921 points

Hi Amy,
Setting VCO frequency to 98.304 MHz and setting the Pdiv before the MUX to 4 should result in best performance for your application.

Regards,

Vicente

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CDCE813-Q1: clock jitter cleaner