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LMK00301: Signal integrity simulation on LVDS output

Part Number: LMK00301

Hi,

I am using 3.3V LVDS output of 125MHz from LMK00301A. This output is given as an input to Ethernet QSGMII PHY 88E1548's REFCLKP/N inputs.

I have used 0.01uF caps as AC coupling caps and there is a 100 ohm differential termination at receiver.

Signal integrity simulation snapshots are attached. What is the recommended termination scheme for connecting 3.3V LVDS output to 1.8V LVDS rated input?

thanks.