- Ask a related questionWhat is a related question?A related question is a question created from another question. When the related question is created, it will be automatically linked to the original question.
Hi,
For clock buffer CDCDB800, we can enable the clk out either by enabling the SMB enable bit(OUT_EN_CLK) or via OE# hardware pins.
a) If I intend to use SM Bus register instead of hardware pins, will the register setting retain after power off?
b) Do we need both OE# pin and OUT_EN_CLK to to enable clock out?
c) In its datasheet it is specified that OE# pin has to be connected to a microcontroller GPIO pin to set HIGH or LOW. Can we use a pull up or pull down resistor instead of microcontroller?
Thanks and Regards,
Shekha Shoukath
Shekha,
a) No, the register values will be lost after power off. From the datasheet, "The SMBus register values are only retained while VDD remains inside of the recommended operating voltage."
b) Yes, you need that to set both OE# pin and OUT_EN_CLK to enable clock out. "Note that both the SMB enable bit must be a 1 and the OEx# pin must be an input low voltage 0 for the output channel to be active."
c) The datasheet mentions that OE# pin is typically connected to a GPIO. But yes, if you want to set an OE# to a constant value, you can use a pull up or pull down resistor to fix the HIGH or LOW state.
Regards,
Will
Hi,
Thanks for the reply.
Could you please clarify the following doubts?
1. in the following image, it is specified that "The SMBus register values are only retained while VDD remains inside of the recommended operating voltage" (highlighted in pink shade) . This condition happens when PWRGD_PD =0.
As this add in card will be inserted into the PCIe slot of a server motherboard, if we turn off the power supply, the power to entire motherboard components will be cut, which means VDD to clock buffer will also be cut. Then how will it retain the register setting as it doesn't have a non volatile memory?
2. 
in the above image, it is specified that both sm bus enable bit and OE# pin is needed to enable the clk out(highlighted in blue).
while in the following image it isspcified that either OE# or sm bus enable bit is required (highlighted in blue), which is the correct method?
Regards,
Shekha Shoukath
Sheka,
1) In the case of SMBus control of the output enable, if your desired state is different then the default (enabled), there would need to be a SMBus command sent setting the OUT_EN_CLK# register to your desired state if power was lost. But if you were using the OE# pins to set your output enable then you would not need to worry about any setting change in the event of a power loss.
2) Both are correct, but it is confusing. Table 8-1 shows the internal logic of the output enable functionality. Section 9.2.2.1 describes the high level functionality given the default states of the OE# pin and the OUT_EN_CLK# bit. Because the OE# pin and the OUT_EN_CLK# bit are both by default set to enable the output, it means that by only modifying either the OE# pin or the OUT_EN_CLK# bit you would be controlling the output enable functionality. I apologize if my previous answer was confusing because I referenced the table of the internal logic.
Regards,
Will
