LMC555型:duty50% operation

Hello,

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Regards,
Mike

I designed an oscillation frequency of 2kHz using the LMC555's 50% duty circuit configuration, but in the evaluation, the frequency was 1.792kHz and the duty was 57%. I believe that the reason why the duty does not reach 50% is that the High voltage of the OUTPUT terminal has not risen to the V+ voltage, but why does the OUTPUT terminal voltage only rise to about 11V? The voltage applied to the V+ terminal is 12V, and no load other than the circuit diagram is connected to the OUTPUT terminal. I have attached the circuit diagram and waveforms, so please respond.

Hey Nakamura, 

In order to achieve 50% duty cycle and also below 50% duty cycle a diode should be used across R7. I have included an explanation below.

We recommend to use a filter capacitor on the control pin as well. Typically we recommend a 0.1 uF filter capacitor on this pin. Is the oscilloscope probe calibrated? Please check that the oscilloscope probe is calibrated for the measurement. 

Please reference our frequently asked questions post for the A-stable design below.

https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/879112/faq-how-do-i-design-a-stable-timer-oscillator-circuits-using-lmc555-tlc555-lm555-na555-ne555-sa555-or-se555

Best Regards, 

Chris Featherstone

Thank you for your response. I will check the method you answered.