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CDCE913: About CDCE913 AC timing

user6308822
Prodigy 60 points
Part Number: CDCE913
Other Parts Discussed in Thread: CLOCKPRO

Hello,Team,

I have questions about CDCE913PW

Q1
Is there any latency between Y1 to Y2/Y3, when this devide is set to use Y1,Y2,Y3 from Pdiv1?
or in that case,using Y1 with Pdiv1,Y2 with Pdiv2,Y3 with Pdiv3,which is the same out Freq,is there any latency between Y1 to Y2/Y3?
And is that possible that using Y1 and Y2/Y3 to output for RCKI for SRC(SRC4184IPAGT) as SYNC?
Q2
Why is there difference about M,N,freq for PLL,in Clock Pro between when using only Y1 and when using Y1/Y2/Y3,in spite of using the same Inclock and the same out Freq setting.
I guess there is no change to set Y2/Y3 to use from Pdiv1 which is used for Y1 setting.
Anyway, in this case that this device to use Y1/Y2/Y3 the same freq and the same Pdiv,i can use reg setting refer to BitViewer in Clock Pro,is that OK?
Q3
In Clock Pro, why i cannot see reg15 nad 31 in BitViewer?
Q4
If i set reg"EEWRITE" to 1 for save the data to memory, is reg"EELOCK" set to 1 immediately without operating reg"EELOCK" setting?


Thank you for your support

  • 0
    TI__Genius 13870 points

    Q1:

    When using PDIV1 as the source (or when all dividers are the same and using individual dividers) the outputs are synchronized:

    Q2: I am not sure what you mean by this. Is this in the ClockPro GUI or behavior observed on the device? Do you have images from the GUI that you can share?

    The BitViewer does not allow for direct bit modification - this must be done in the main window or in the Direct Register View.

    Q3: You may need to either expand your window size or install the latest version of ClockPro:

    Q4: Set the EEWRITE bit to a '1' in order to begin the EEPROM programming process - I do not recommend setting the EELOCK bit to a '1' in order to prevent the EEPROM from being permanently locked. This is typically only done when the configuration is completely finalized. Using the "Write to EEPROM" button in ClockPro will not set the EELOCK bit - ensure that the "EEPROM Lock" box is unchecked when writing the EEPROM.

    Thanks,
    Kadeem

  • 0 in reply to Kadeem Samuel
    Prodigy 60 points

    Hello, Team,

    Thank you for your answer.

    AdQ1：Both of 2 cases, is there any difference of current strength for Y1/Y2/Y3?


    AdQ2: I put 2 pics about my questions, you can see 2 cases, which is the setting to use Y1/Y2/Y3 as Freq 24.576MHz.
    but you can also see the difference of PLL1 freq, M, N and Pdiv num btw 2 cases.
    Why are there differences?

    AdQ3: i use ClockPro"Ver1.2.1/ Windows", then according to below pic, you cannot see bit 15 and 31.

    Thank you for your support

  • 0 in reply to user6308822
    TI__Intellectual 2495 points

    Hello,

    Q1. We will look into the current strength of the outputs tomorrow.

    Q2. I was able to replicate this on my own Clock Pro application. I have contacted our loop filter expert for greater insight as to why this may be the case. But it may be that the different outputs perform better with different settings. So when using all 3 outputs in the wizard, it will consider all the outputs, but when only using one, it will prioritize that output. 

    Q3. Does uninstalling and reinstalling the application fix this issue?

    Best,

    Cris

  • 0 in reply to Cris Kobierowski
    TI__Genius 13870 points

    Hello,

    I do not see any difference in the current consumption between using only the PDiv1 divider only versus using PDiv1, PDiv2, and PDiv3 individually for all three outputs.

    Thanks,

    Kadeem