This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Kindly suggest Clock Synthesizer, where the following outputs shall be configured 125MHz, 100MHz, 156.25MHz (LVDS), 300MHz and 25MHz(LVCMOS). It shall be hard-coded and each outputs shall have dedicated enable/disable future as well. 25MHz output frequency is not mandatory
Manikandan,
The team is out of office for the US holiday, please expect a response by tomorrow.
Thanks,
Kadeem
Manikandan,
Is the 300MHz clock LVDS, or LVCMOS? The below recommendations assume LVDS, as we do not have any devices that support LVCMOS at 300MHz.
LMK05318B and LMK03328 can generate all of these clocks, but not with the dedicated individual output enable. Only global output enable is supported.
LMK3H0102 + CDCE6214 can support this request with individual output enable.
If you can clarify the formats for the clocks, and let us know of any jitter requirements, I can provide more specifics for this configuration.
Thanks,
Kadeem