LMH1983: XOin- for single-end input to XOin+

Hello,

When LVCMOS single-end input to XOin, the datasheet states to bias XOin- to mid-supply with 0.1uF bypass capacitor. The 8.2 Functional block Diagram also follows this. However, Figure 3.3 is different. The XOin- is not biased to mid-supply. Why?

Best regards,

K.Hirano