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CDCM6208: CDCM6208: Problems with I2C communication

Part Number: CDCM6208

Tool/software:

Hello Kadeem,

it's a while since your last message.

Do you have any updates for me?

I do not know the reason for closing our last thread

Thank you very much.

Best regards

Joshua

  • Joshua,
    Do you have a waveform that you can provide of this case that I can pass to the design team?

    Can you also provide your schematic for this project?

    Thanks,
    Kadeem

  • Hello Kadeem,

    as described in our last case (https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1327896/cdcm6208-problems-with-i2c-communication) you can't see the behaviour in waveforms because the I²C waveforms are fine and also the rise times are not the problem.
    The problem is that the CDCM6208 do not send an ackknowledge in the middle of the writing sequence because we check after every register if everything is ok because we find this problem.
    In the worst case the CDCM6208 isn't answering in the first I²C message. But after a dummy I²C communication there aren't any problems with the communication.

    You told me the last time that you will have a look in the model so that's the reason I'm asking again for you answer.

    Thank you very much.

    Best regards
    Joshua

  • Hi Joshua,

    Kadeem is out of office this week.

    I don't know the details of the I2C, sounds to me that not all CDC6208 have this issue. As you mentioned, I2C is not 100% responsive in the first attempt, but 100% responsive after the first attempt, looks to me this a software workaround. Is this workaround doable in your application?

  • Hello Noel,
    yes it could be a workaround but for us would be very interesting if it's a problem by design of the CDCM6208 because in your forum are lots of topics about I²C and CDCM6208 and in our design are the risetimes and capacities not the reason for the behavior previously described in my messages.

  • Joshua,

    Please provide your email address, and I can create a thread with the designer where we debug this issue. I see in other threads that there are mentions of noise on the DVDD pin causing the problem, faster slew rates for CLK & DATA fixing the problem, and so on. 
    If you have the oscilloscope captures of your case, this will help greatly for the analysis.

    Thanks,
    Kadeem