CDCLVP111: Clock Buffer Behaviour When Floating Input is Selected

Part Number: CDCLVP111

Tool/software:

Hi all,

I was wondering what would be the behaviour of the CDCLVP111 if a floating clock input is selected through the clk_sel pin. In my design, I need to gate or buffer the outputs of the clock buffer for sequencing and was wondering if having an idle/floating input would be okay for this functionality? 

Thanks!

- Rick

  • Rick,

    If a floating clock input is selected then the output will be stuck at a static DC voltage.  There is a internal pull up and pulldown on the input pin that will prevent any hysteresis.  

    Let me know if this answers your question.

    Regards,

    Will