LMX2594: Recommendation for LVDS oscillator

Hi Abhijith,

The slew rate and phase noise of the reference clock will affect PLL performance, you should pick a reference clock that can meet your target LMX2594 output performance requirement. 

Slew rate is usually not a problem for a LVDS clock. What you need to find out is the phase noise requirement for the reference clock. 

What is your performance requirement from LMX2594?

Hi Noel,

We are planning to provide the LMX's Sampling clock and SYSREF to a LMK04828B which will work in clock distribution mode and the ADC ICs will be TI's ADC12QJ1600AAV.
From the datasheet of the IC, I can find the below performance specifications

Performance specifications (–1 dBFS):
– SNR (500 MHz): 57.2 dBFS
– ENOB (500 MHz): 9 Bits
– SFDR (500 MHz): 64 dBc
- Noise Figure (NF): 26.2 dB
– Noise floor (–20 dBFS): –147 dBFS

Regards,
Abhijith

Hi Abhijith,

The ADC has a built-in synthesizer, could you ask the ADC guys for the reference clock specification to this synthesizer? This specification should apply to LMX2594.

Hi Noel,

I will get back to you as soon as ADC support person replies.

In the meantime, LMX datasheet is recommending 

"FC0402E50R0BST1" resistor part at the RF output buffer pull-up.

We are currently using the "RC0201FR-0749R9L" resistor for this, Is it must to use the recommended part from datasheet?

Hi Abhijith,

The recommended resistor is a 'wideband' resistor, it can maintain the resistance across a broadband of frequency. 

Your application is 1G to 1.6GHz, you can use regular resistor. 

Hi Noel,

Thanks for the reply, I'm not clear on the regular part which you mentioned. Is it "RC0201FR-0749R9L" ?

Hi Noel,

The ADC Support person implied that there is no strict phase noise restriction for the ADC IC. But more phase noise will result in worst performance.

Hi Abjijith, 
We need to know the reference clock requirements for the ADC i.e. swing, common mode voltage, format type (LVPECL, LVDS, LVCMOS), etc. 

Regards, 

Vicente