LMX2572LP: Not locking when VCO_PHASE_SYNC is enabled

Part Number: LMX2572LP

Tool/software:

Hello,

I am using LMX2572LP in a design for a couple of PLLs. They are working fine in the 800MHz-1000MHz range which is our desired range.

Fractional mode is needed for the steps in this range.

Now we want to get it working with an external SYNC pin input to trigger the sync.

As given in the datasheet this puts us in Category 3 of sync.

  • fOSC is within the range (100 MHz)
  • OSC_2X, MULT are both not set
  • Set N = N'/2 is not possible as this takes the value below 20, so instead I am setting PLL_R = 2 to compensate for the extra divide by 2 in the fVCO path
  • Since now the pFD is half of before I changed  FCAL_HPFD_ADJ accordingly from 2 to 1
  • All registers programmed with VCO_PHASE_SYNC_EN=1 in R0
  • However, I am not getting lock beyond a few frequencies, whereas earlier without VCO_PHASE_SYNC_EN the entire frequency range locked for both of our PLLs.

I am not sure if what I have done above using PLL_R = 2 (instead of = 1 without VCO_PHASE_SYNC_EN) is correct?

I could not think of any other method to keep the new N value within range.

I checked by using TICSPro simulation and it confirmed same settings as I have used.

Please advise.

Thanks,

Arun

  • Hi Arun,

    Which frequency is not able to lock with VCO_PHASE_SYNC_EN = 1? 

    Could you share your configuration in TICS Pro format? For example,

  • Hi Noel,

    My TICSPro setup is same as yours except I used the R instead of PRER. Any issue with that?
    Having said that, after seeing your screenshot almost match with mine I went back to my settings and realised I had made a mistake in calculation of the divider after enabling R=2. After fixing this I am getting a lock now across my frequencies. So thanks for your help.

    But please do let me know about R vs PRER and then we can close this issue.

    Thanks again,

    Arun

  • Hi Arun,

    Your fosc is below 200MHz, there is no performance difference between Pre-R and Post-R.