Our board has two CDCE62005 chips cascaded together, with the first chip always gaining and keeping lock. However, the 2nd chip (fed by 125Mhz from the first chip) always loses lock within a temperature window of about 50-55degC (case temperature). If the chip's case temp rises above 55degC, the part then re-locks. Lowering the temperature produces the same window where the part unlocks. This has occurred on all three of the prototype boards we have.
Here are the register settings for both chips. Both chips are have their power down pins de-asserted at the same time, but the 2nd chip is not configured/calibrated until the first chip achieves lock. Calibration occurs in after each register set is configured (by writing to register 6 multiple times).
1st chip register writes, in order or execution:
0 EB060320
1 EB060301
2 EB0C0302
3 EB040303
4 EB040314
5 38000B25
6 00BE03E6
7 BD91BDE7
8 80009CD8
6 80BE03E6
6 84BE03E6
2nd chip register writes, in order or execution:
0 EB800320
1 EB860301
2 EB820302
3 EB860303
4 EB860314
5 380C0BE5
6 00AE01A6
7 BD91FDF7
8 20009CD8
6 80AE01A6
6 84AE01A6
Thanks, Allan
