Other Parts Discussed in Thread: LMK04610
Hi,
I need to distribute twelve device clock and SYSREF signals in my system (to DACs, ADCs and FPGA).
The part with the highest count of clock outputs i saw is the LMK04616 which has sixteen clock outputs (eight device clock and eight SYSREF signals).
Still, i am four clocks short. What is the best way of using several JESD204B compliant clock distributors and still guarantee deterministic relationship between
all SYSREFs and device clocks in the system?
Thanks in advance,
Guy.