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Original question:

LMK04616: low skew mode

LMK04616: Low skew mode

Shlomi Is'hakov
Intellectual 270 points
Part Number: LMK04616
Other Parts Discussed in Thread: LMK04832

I can't understand the phase relationship between the ClkinX and the sysclk.

Can you please see the attached wave-forms:

Assume the asynchronous sync pulse inserted to the clock distributed at SYNC 1 time or SYNC 2.

My question:  Where will the sysclk appear in this timing diagram in case of pulse at SYNC 1 and in case of SYNC 2?

Will it appear in the same place (time) in both cases?

  • 0
    TI__Mastermind 28550 points

    Hello Shlomi,

    So the low skew mode, this term was updated to zero delay mode in the latest datasheet as it matches the LMK0482x/LMK04832 zero delay mode, results in phase determinism between OSCin and the feedback clock.

    Looks like your question relates to the SYSCLK timing given an asynchronous SYNC at SYNC1 or SYNC2.  I do not believe there is an relationship of SYNC to CLKin.  Have you reviewed application report SNAU222, please look at configuration 3 and 5.  In all these cases the downstream devices are referenced using OSCin..

    73,
    Timothy