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LMK04616: Programming two LMK04616 in configuration 1C in snau222.

Gianfranco Schwengle1
Prodigy 100 points
Part Number: LMK04616

Hi,

In SNAU222 there is multi-device synchronization circuit using two LMK04616. One device providing DEVCLK and the other SYSREF. What is the best to configure and program these devices?

At the moment, I have one device configured with SYNC output channel for the DEVCLK and the other SYSREF REQUEST on the SYNC PIN FUNC. The first device start up and run, but the second device does not.

Wondering what can I be doing wrong? SNAU222 does not elaborate on how configure and programming two LMK04616.

Can somebody eleborate on this please.

Kind regards,

Gianfranco Schwengle

  • 0
    TI__Mastermind 29830 points

    Hi Gianfranco,

    In the figure for configuration 1C, it suggests device 2 should be in PLL2-only zero-delay mode. This can be specified by TICS Pro first by specifying one of the `Single Loop PLL2` options with Ref=OSCin on the `Operating Modes` page, then by adjusting PLL2_FBDIV_MUXSEL and PLL2_NDIV on the `PLL2` page. After establishing the TICS Pro configuration as desired, I recommend toggling the device reset from the `User Controls` page, writing all registers, and writing the DEV_STARTUP bit (or clicking the `Device Start` button on the `Generic` page, which does the same thing).

    Note that LMK04616 TICS Pro GUI shows the zero-delay feedback path options as OUT7/OUT8, SNAU222 shows the zero-delay options as OUT6/OUT7, and the datasheet shows the options as OUT6/OUT9. I am not sure which outputs are actually used for zero-delay feedback, but an incorrect feedback frequency could also explain why the second PLL would not lock.

    Regards,

  • 0 in reply to Derek Payne
    Prodigy 100 points

    Hi Derek,

    Thank you for the response. At the moment I have one LMK(DEVCLK) operating in dual mode, while the second LMK(SYSREF) operates in single PLL2 mode. How should the SYNC function for these two devices be configured. It is to my understanding from the datasheet. That when the SYNC fucntion is configured for SYSREF request, the output channel are synchronised once through a GLOBAL SYNC during initialisation, and any SYNC trigger afterwards will only generate SYSREF pulses. However, if the LMK configured for DEVCLK is configured to SYNC on every SYNC trigger. Will this not cause the DEVCLK and SYSREF to go out of synchronisation every time an SYSREF signal is requested through the SYNC pin or SPI SYNC bit?

    I did not find any information about this. When one LMK device is configured to generate both DEVCLK and SYSREF all the output channel are synchronised through the global SYNC. So it is not a problem when using one device. However, using two I do not know can you elaborate on this please? Should I configure the SYNC pin of the DEVCLK for SYSREF request and disable the CHx_SYS_RQ? To ensure that the LMK that produces the DEVCLK only SYNC once on the GLOBAL SYNC, and the ingore all other SYNC trigger that are meant for the SYSREF REQUEST to ensure all the outputs are synchronised.

    Thank you for taking the time Derek.

    Kind regards,

    Gianfranco

  • 0 in reply to Gianfranco Schwengle1
    TI__Mastermind 29830 points

    Hi Gianfranco,

    You would synchronize the devices once immediately after startup to fix the phase of the device clocks and the SYSREFs to the OSCin phase, as long as the SYNC event on both devices is simultaneous. It has to be a pin-based SYNC, because the SPI bus is neither fast enough nor predictable enough in its timing to synchronize multiple devices.

    Both devices would be configured with EN_SYNC_PIN_FUNC = 1, SYNC_PIN_FUNC = 0 `SYNC output channels`, and SYNC_EN_CHX_Y would be set for all of the outputs. The SYSREF device must have SYSREF_EN_CHX_Y = 1 for each SYSREF output in addition to SYNC_EN_CHX_Y = 1. (SYNC_EN and SYSREF_EN settings can be simultaneously enabled without issue, as SYNC and SYSREF request use separate paths in LMK0461x devices.)

    After the initial synchronization pulse:

    • For the DEVCLK device, you would not send any further signals on the SYNC pin - this device can be set with EN_SYNC_PIN_FUNC = 0 to prevent any unwanted SYNC events.
    • For the SYSREF device, you would set SYNC_PIN_FUNC = 1 `SYSREF Request` and the SYNC pin on the SYSREF device will now be used to request SYSREF signals.

    I put together a flowchart to explain the SYNC/SYSREF settings for the LMK0461x devices a while ago, and I've attached it below. The flowchart makes some assumptions about initial register settings, for instance relating to clock delays, which may be different for your system. Regardless, any explicitly required settings will be indicated on the flowchart path. Additionally, treat the case of multiple devices as a `YES` to the change since POR decision point.

    LMK0461x Divider Reset Flowchart.pdf

    Regards,

  • 0 in reply to Derek Payne
    Prodigy 100 points

    Hi Derek,

    Again thank you for the fast response. This clears up some assumption being made with programming the two devices.

    Thank you.

    Gianfranco Schwengle