Question on ADS1294 schematic.

SANG RAE LEE

Prodigy 180 points

Other Parts Discussed in Thread: ADS1294, ADS1294R, REF5025, REF5050, ADS1298, ADS1299, ADS1296, ADS1296R, ADS1298R

Hi, my name is Sang Rae Lee worked for PANAXTOS of Korea.

Our company has produced EEG product.

We are preparing new product together with one university in Korea.

In recent, we received prototype schematics including TI's ADS1294 from co-work university.

Now, we are reviewing about this prototype schematics to develop mass production.

We have some questions after reviewing schematics.

So, we want to obtain schematic review from expert engineers experienced in this part.

1. Description of our prototype schematic

1) End-application : EEG system

2) Power supply

(1) Analog Power : bipolar(AVDD:2.5V, AVSS:-2.5V)

(2) Digital Power : DVDD(3.3V)

3) Input signal : single-ended or differential input

4) Voltage Reference inputs : internal reference voltage

2. Question

1) Connection of pin VREFP and VREFN : We connected VREFP to GND(0V) and VREFN to AVSS(-2.5V). Is this correct?

question-panaxtos.pptx

2) Connection of unused pins : "Connect unused pins(INxP,INxN,RLDIN,.....) to AVDD" is written in TI's datasheet. Must we follow this guide line?

3) Connection of other unused pins : We are not using WCT and respiration function of ADS1294. So these pins(WCT, RESP_MODP,...) related to this function are left floating status. Is this correct?

4) We have firmware running in prototype product including ADS1294. But we have to develop mass product using ADS1294R. It is no difference in H/W but ADS1294 and ADS1294R between each product. Is it possible to run same firmware in new product including ADS1294R?

Thank you.

over 7 years ago

0 Praveen Aroul over 7 years ago

TI__Mastermind 49666 points

Hello Sang Rae,

Welcome to TI E2E forum.
I am moving your post to the Precision Data converters forum where the ADS1294 device is supported.

0 Brian Pisani over 7 years ago

TI__Mastermind 38745 points

Sang Rae Lee,

If you want to send the full schematic, I can review it.

Do not connect VREFP to ground if you are using the internal reference buffer. This will create a short circuit.
It will not affect the functionality of the ADS1294, but tying them to AVDD will improve power consumption slightly.
That is correct.
The routine to collect the data from the device will be no different between the ADS1294 and ADS1294R. The only difference will be register settings and how to interpret the respiration data you collect from the ADS1294R.

Regards,

Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hi, Brian Pisani.

Thank you for your answer.

We want to be review our schematic by you.

Please, refer to attached pdf file for our full schematic.

20161012_4ch_schematic_ver1_0.pdf

Some pin names used in our schematic library are different from the pin names in your datasheet.

So, for your convenience and to prevent from confusing caused by those differences, refer to below lists.

(1) pin 17: TESTP_PACE_OUT1(your datasheet) => SRB1(our schematic)

(2) pin 18: TESTN_PACE_OUT2(your datasheet) => SRB2(our schematic)

(3) pin 60: RLDREF(your datasheet) => BIASREF(our schematic)

(4) pin 61: RLDINV(your datasheet) => BIASINV(our schematic)

(5) pin 62: RLDIN(your datasheet) => BIASIN(our schematic)

(6) pin 63: RLDOUT(your datasheet) => BIASOUT(our schematic)

(7) pin 64: WCT(your datasheet) => RESERVED(our schematic)

Now, we have additional questions.

Question 1) : We are using bipolar power supply(AVDD:2.5V, AVSS:-2.5V). Is the level of internal reference absolute voltage level? For example, if we connect AVSS to -2.5V and we set internal reference voltage to 4V, then what is the output voltage of pin VREFP(real internal reference voltage : 4V or 1.5V ?)? As another case, if we connect AVSS to GND(0V), then what is the output voltage of pin VREFP?

Question 2) : We are studying about your datasheet to find difference between ADS1294 and ADS1294R. But until now, we have not found difference except a fully integrated respiration impedance measurement function of ADS1294R. But, because we are not using respiration function, it seems as though we have no addition S/W job to cope with changing from ADS1294 to ADS1294R. Are there any other opinions about this ask?

Thank you.

Bye.

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hi, Brian Pisani.

What is your email address?
I will send our full schematic to you for schematic review.

Thank you.
Bye.

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae Lee,

A few commends on the schematic:

Tie DAISY_IN low
GPIOs should be ties low if unused. Otherwise, be sure to configure them as outputs during initialization
Unused inputs should be tied to AVDD, but it will not affect functionality if they are not
If you do not plan on using an external clock, you can tie CLKSEL high in hardware, saving yourself a GPIO on the microcontroller

No I will answer your questions;

The reference voltage is generated with respect to AVSS. If you use the 4V supply, VREFP will be 1.5 V with respect to ground. This does not affect the differential voltage range of the inputs. You would, in theory, still be able to measure -4V <= (IN1P - IN1N) <= 4V. In practice, you have tied IN1N to ground which means the rails will limit your measurement range, rather than the reference.
There is no difference in the package or interface. The only difference has to do with how you configure the registers and how you interpret the data that comes from channel 1. If you never plan on using the ADS1294R, then you don't have to worry about it.

Regards,

Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello Brian Pisani,

Thank you for your guide on our ADS1294 schematic.

We want to check your comments before wrapping our schematic up.

So, we ask you to confirm below list-up information obtained from you.

1) VREFP connection

(1) Your Comment : Do not connect VREFP to ground if you are using the internal reference buffer. This will create a short circuit.

(2) Our Opinion : We will change our schematic as your comment and TI's reference schematic.

(3) Our Additional Ask : Although our schematic was wrong, our prototype PCB has been running well. We think that our prototype PCB has not operated due to creating a short circuit. What is your opinion about this phenomenon? It is important that we obtain right information because we are preparing various products such as 4-channel, 8-channel and 32-channel EEG system based on this schematic.

2) DAISY_IN connection

(1) Your Comment : Tie DAISY_IN low.

(2) Our Opinion : We will connect this pin to digital ground.

3) Unused GPIOs connection

(1) Your Comment : GPIOs should be ties low if unused. Otherwise, be sure to configure them as outputs during initialization.

(2) Our Opinion : We will connect these pins(GPIO1,GPIO2,GPIO3 and GPIO4) to digital ground.

4) Unused inputs connection

(1) Your Comment : Unused inputs should be tied to AVDD, but it will not affect functionality if they are not.

(2) Our Opinion : We will connect these pins(IN5P,IN5N, ~ ,IN8P,IN8N, TESTP_PACE_OUT1, TESTN_PACE_OUT2, and RLDIN to AVDD(+2.5V).

5) CLKSEL connection

(1) Your Comment : If you do not plan on using an external clock, you can tie CLKSEL high in hardware, saving yourself a GPIO on the microcontroller.

(2) Our Opinion : We appreciate your useful information to save a GPIO on the microcontroller.

6) Power Supply and Internal Reference Voltage

(1) Your Comment : The reference voltage is generated with respect to AVSS. If you use the 4V supply, VREFP will be 1.5 V with respect to ground. This does not affect the differential voltage range of the inputs. You would, in theory, still be able to measure -4V <= (IN1P - IN1N) <= 4V. In practice, you have tied IN1N to ground which means the rails will limit your measurement range, rather than the reference.

(2) Our Opinion and additional questions : We are using bipolar power supply and single-ended inputs. In general, we have understood that the range of IN1P is from +2.5V to 0V and the range of IN1N is from 0V to -2.5V. And the range of signal which is passed through amplifier and ADC is from CM+4V to CM-4V. So, the range of our signal is from +4V to -4V because we are using single-ended inputs and are connecting IN1N to ground(0V). [Question 1] Is this our opinion correct? We can not understand your comment written in last sentence("In practice, you have tied IN1N to ground which means the rails will limit your measurement range, rather than the reference."). [Question 2]We ask more easy and detail information about this,again.

7) ADS1294 vs. ADS1294R

(1) Your Comment : There is no difference in the package or interface. The only difference has to do with how you configure the registers and how you interpret the data that comes from channel 1. If you never plan on using the ADS1294R, then you don't have to worry about it.

(2) Our Comment : We already have ADS1294R and must use this. So we must know difference between ADS1294 and ADS1294R.

(3) Our Additional Ask : We have understood that there is only difference in DEVICE ID register because we are not using respiration function of ADS1294R. But we are worried about the ADS1294R channel performance degradation caused by internal respiration circuitry. What is your opinion about this problem for our EEG system?

Thank you.

Bye.

Best regards.

Sang Rae Lee

PANAXTOS

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae Lee,

I will answer your questions:

SANG RAE LEE said:
(3) Our Additional Ask : Although our schematic was wrong, our prototype PCB has been running well. We think that our prototype PCB has not operated due to creating a short circuit. What is your opinion about this phenomenon? It is important that we obtain right information because we are preparing various products such as 4-channel, 8-channel and 32-channel EEG system based on this schematic.

Though the chip may still function, I believe if you were to do an accurate measurement of gain error or linearity, you would not be able to achieve datasheet performance.

SANG RAE LEE said:
(2) Our Opinion and additional questions : We are using bipolar power supply and single-ended inputs. In general, we have understood that the range of IN1P is from +2.5V to 0V and the range of IN1N is from 0V to -2.5V. And the range of signal which is passed through amplifier and ADC is from CM+4V to CM-4V. So, the range of our signal is from +4V to -4V because we are using single-ended inputs and are connecting IN1N to ground(0V). [Question 1] Is this our opinion correct? We can not understand your comment written in last sentence("In practice, you have tied IN1N to ground which means the rails will limit your measurement range, rather than the reference."). [Question 2]We ask more easy and detail information about this,again.

That is not quite right. There are two limits to signals that can be measured by the ADC. The first is the rails. No input voltage can exceed the power supply voltages on either end. Since you are using +/-2.5V, that means that neither INxP or INxN can have an absolute voltage of 2.5 V when measured with respect to ground.

The other limit you need to worry about is the reference voltage. The reference is the "functional limit" to the ADC's ability to measure differential inputs. Rather than being related to the power supplies, the reference simply dictates that the voltage between the inputs (INxP - INxN) may not exceed +/- Vref.

You will not be able to measure 4V at the input. Let me elaborate. If you tried to measure a 4 V signal with INxN tied to ground, that would make INxP = 4 V. However, AVDD is 2.5 V so this would exceed the input rails.

If instead the electrodes were being measure differentially, you could imagine a scenario where INxN was at -2 V and INxP was at 2 V - both within the power supply rails. The ADC would measure (INxP - INxN) = 4 V which is the maximum voltage the the reference will allow. Does this make sense now?

SANG RAE LEE said:
(3) Our Additional Ask : We have understood that there is only difference in DEVICE ID register because we are not using respiration function of ADS1294R. But we are worried about the ADS1294R channel performance degradation caused by internal respiration circuitry. What is your opinion about this problem for our EEG system?

All channels should perform to the specifications that are described in the datasheet - including channel 1 of the ADS1294.

Regards,

Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian Pisani.

Thank you for your sincere answer about our schematic, again.
But we can not understand some answer of those because we did not design ADS1294, although you have given more detail explanation.
So we want to know about questions that have not been understood through this Q & A.
We plan to develop two 4-channel EEG systems before developing 8-channel and 32-channel EEG systems.
The one is 4-channel EEG system including OP-AMP and ADS1294 as analog front end.
Another system is 4-channel EEG system including ADS1294 only.
Let us introduce our two systems to communicate more exact.

1. Our EEG System1

1) Description

(1) Device : OP-AMP + ADS1294
(2) Analog Power Supply : Bipolar Power Supply(+2.5V, -2.5V)
(3) Input Signal : Single-ended mode, INxN=0V(ground)
(4) Reference Voltage : Internal reference voltage(4V or 2.4V)
(5) VREFN Connection : AVSS(-2.5V)
(6) EEG Signal Range : 30uV(minimum) ~ 100uV(maximum)
(7) OP-AMP Gain : 1000
(8) ADS1294 Gain : 12
(9) Total Gain : 12000

2) Our System Operation Scenario From external electrodes To Internal ADC of ADS1294

(1) EEG signal from electrodes connected to brain : 30uV ~ 100uV
(2) EEG signal passed through OP-AMP : 30uV X 1000 = 30mV, 100uV X 1000 = 100mV. So the peak-to-peak range is 30mV ~ 100mV
-> There will be no problem because we use bipotential power supply(+2.5V,-2.5V).
(3) EEG signal passed through ADS1294 internal AMP : 30mV X 12 = 360mV, 100mV X12 = 1200mV. So the peak-to-peak range is 0.36V ~ 1.2V.
-> The signal will swing from +0.6V to -0.6V based on 0V(Common mode voltage) because we connect INxN to ground(0V).
-> There will be no problem because we use bipotential power supply(+2.5V,-2.5V) and we use internal reference voltage(4V or 2.4V).
(4) EEG signal passed through ADS1294 internal ADC
-> The signal swinging from +0.6V to -0.6V between (+4V and -4V) or between (+2.4V and -2.4V) will be convert analog signal to the digital codes based on Table 13 in ADS1294 datasheet.

3) Our Question

(1) Is correct our scenario written in above?

(2) What is the role or function of VREFP and VREFN?
-> We have understood that if we use internal reference voltage(4V or 2.4V), then ADS1294 output 1.5V or -0.1V to VREFP because reference voltage is generated with respect to AVSS.
=> Is correct this?
-> But the capacity of dynamic range in this case is from +4V to -4V or from +2.4V to -2.4V because common mode voltage is 0V.
=> Is correct this?
(3) If we use external reference driver such as REF5025(2.5V) instead of internal reference under same conditons, then is the result same as your answer about using internal reference?
Namely, VREFP is 0V(with respect to -2.5V) and the range of ADS1294 internal ADC is from +2.5V to -2.5V. Otherwise, is VREFP 2.5V(with respect to 0V) and is the range of ADS1294 internal ADC from +2.5V to -2.5V?

But we have worried about this situation because if we use external reference driver, then VREFP is input and reference voltage is generated with respect to AVSS. Is only internal reference voltage generated with respect to AVSS? Is different operation under external reference voltage?
If so, must we use REF5050(5V) and connect GND of REF5050 to AVSS(-2.5V)? If so, REF5050 will output 2.5V with respect to AVSS and VREFP is +2.5V and VREFN is -2.5V. In this case, is the range of ADC +2.5V ~ -2.5V or +5.0V ~ -5.0V? Is used the charge pump of ADS1294 in external reference voltage mode?
We have confusioned about this problem because there is difference between using internal reference voltage and external reference voltage.
Is this correct?
(4) If there is difference in operation between internal reference voltage and external reference voltage, then is internal reference voltage(4V or 2.4V) absolute value regardless of outputting 1.5V or -0.1V to VREFP with respect to AVSS(=VREFN=-2.5V)?

2. Our EEG System2
1) Description

(1) Device : ADS1294 only
(2) Analog Power Supply : Bipolar Power Supply(+2.5V, -2.5V)
(3) Input Signal : Differential mode
(4) Reference Voltage : Internal reference voltage(4V or 2.4V)
(5) VREFN Connection : AVSS(-2.5V)
(6) EEG Signal Range : 30uV(minimum) ~ 100uV(maximum)
(7) ADS1294 Gain : 12
(8) Total Gain : 12

2) Our System Operation Scenario From external electrodes To Internal ADC of ADS1294

(1) EEG signal from electrodes connected to brain : 30uV ~ 100uV

(2) EEG signal passed through ADS1294 internal AMP : 30uV X 12 = 360uV, 100uV X12 = 1200uV. So the peak-to-peak range is 0.36mV ~ 1.2mV.
-> The signal will swing from +0.6mV to -0.6mV based on (INP+INN)/2V(Common mode voltage) because we use differential mode.
-> There will be no problem because we use bipotential power supply(+2.5V,-2.5V) and we use internal reference voltage(4V or 2.4V).
(3) EEG signal passed through ADS1294 internal ADC
-> The signal swinging from +0.6mV to -0.6mV between (CM+2V and CM-2V) or between (CM+1.2V and CM-1.2V) will be convert analog signal to the digital codes base on Table 13 in ADS1294 datasheet.

3) Our Question

(1) Is correct our scenario written in above?
(2) If we use differential mode with external reference voltage and with REF5050 connected GND to AVSS(-2.5V), then what is the range of ADC? (CM+2.5V~CM-2.5V or CM+1.25V~CM-1.25V ?)

And we have additional question about ADS1294R.
Is there always channel 1 performace degradation regardless of turning off respiration function of ADS1294R?
Namely, If we turn off respiration function of ADS1294R because we don't use that function, then can we prevent from degrading channel 1 performance?

I'm so sorry if I bother you because of our misunderstanding and simple problem.

Thank you.
Bye.

Best Regards.
Sang Rae Lee.
PANAXTOS.

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae Lee,

It sounds like there is a lot of confusion surrounding the idea of the ADC reference voltage. Let me explain.

The reference voltage is simply the voltage that gets compared to the input voltage to determine the "weight" of an LSB. On the ADS1294, the reference voltage is defined by (REFP - REFN). Note how this is just the voltage difference between the positive and negative reference pins. It has nothing to do with the common-mode of that voltage. We only recommend connecting REFN to AVSS because that is how the device was designed and tested.

The formula for determining the output code is as follows: output code (in decimal) = [(INxP - INxN) x Gain / (REFP - REFN)] x 2^23-1. This equation basically says that the the output code will be the ratio of the input to the modulator (after the gain stage) and the reference voltage multiplied by the largest possible code. Note how the common-mode of neither the reference nor the input plays any role in determining the output code. The common-mode has no functional bearing on how the ADC converts analog to digital.

The only place the common-mode of the signal affects the ability to measure it is as they relate to the fact that the electronic components are limited to voltages within their power supply rails - note how this is distinct from the functional behavior of an ADC.

In your first design, INxN is tied to GND. If VREFP - VREFN = 4V, the ADC's largest positive output code corresponds to a scenario where (INxP - INxN) x Gain = 4V. However, AVDD is 2.5 V, so the PGA output can never exceed 2.5 V meaning the largest voltage you will be able to measure is 2.5 V / gain since the output of the PGA cannot exceed the rail.

However, this should not be an issue since your maximum signal amplitude is 600 mV. In fact, either case you listed above is completely valid, so there should be no concern.

The only thing that changes when you use an external reference voltage is the voltage that maps to the maximum digital code. If you were to use an external reference, you should always tie the GND output from an external reference to AVSS since that is how the chip is designed and tested. That being said, you cannot use the REF5050 because we recommend that the reference voltage not be so close to the AVDD voltage.

In your case, I would simply use the internal 2.4 V reference which allows the measurement of input signals from +2.4V/gain to -2.4V/gain. In your case, this corresponds to +/- 200 uV which is significantly larger than the signals you wish to measure. Hopefully you understand how this works now.

Regards,

Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian Pisani.

We have misunderstood until now because our company's engineer did not draw this prototype schematic.

Our prototype EEG system have been used under condition of external reference voltage.

The schematic engineer who developed our prototype EEG system have confirmed this.

So, we want to apology for you about this inaccurate questions until now, sincerely.

Please, refer to our changed descriptions and questions.

1) Our changed description

(1) Reference Voltage : External Reference Voltage

(2) VREFP connection : Ground(0 V)

2) Our Questions

(1) We have connected VREFP to ground(0V) and VREFN to AVSS(-2.5V).

And, we have set reference voltage to external mode through setting PD_REFBUF field of Configuration Register 3 to '0' which means that internal reference buffer is powered down. So we have used external reference voltage(VREFP=0V, VREFN=-2.5V).

In this case, is the voltage of VREF 2.5V?

=> (The reference voltage is defined by [REFP - REFN] by your answer. So, VREFP-VREFN=0V-[-2.5V]=+2.5V)

And, is the dynamic range of ADC included in ADS1294 +2.5V ~ -2.5V?

(2) If we connect +1.2V input to VREFP under same conditions, then is the dynamic range of ADC +3.7V ~ -3.7V ?

=> (VREFP-VREFN=1.2V-[-2.5V]=3.7V)

Our prototype EEG systems have run well as we said in former posting, but we want to obtain correct answer about above questions from you for future work.

And we want to change our ADS1294R to your ADS1294.

We have already possessed ADS1294R and their quantity in our stock is 4000-unit.

Can you help us make this exchange?

Thank you.

Good Bye.

Best Regards.

SANG RAE LEE

PANAXTOS.

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae Lee,

Your understanding of how the reference will affect dynamic range is correct in both cases. The only potential issue I can see with using the ground voltage as the reference is that it will be noisy. But since you are using such a high gain, the reference noise may be small relative to the signal. If you are seeing a lot of noise in the data, that could be the reason.

I cannot help you exchange your devices. You should contact your distributor about that.

Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian Pisani.

Thank you for your answer about our EEG system schematic including ADS1294 and OP-AMP.
Do not you recommend using of ground level as external reference with low gain?
Is ground level more stable than other power supply?
We want to obtain more detail information from you.
In former ask, we introduced our another EEG system including ADS1294 only to you.
The signal range of that system is 360uV ~ 1200uV(1.2mV) as you know. (the result passed through internal PGA[X12] in ADS1294)
In this case, what is your opinion compared to your former answer?
What is the best external reference voltage level in this case?

And we have another question about anti-aliasing filter.
Although ADS1294 has powerful function combined with the on-chip digital decimation filter and the limited bandwidth of the PGA in anti-aliasing as your datasheet, there is recommendation for using external RC low pass filter with perfectly matched differential signal to remove common mode signal.
What is your opinion about anti-aliasing filter and common mode signal rejection?

Lastly, there is question related to firmware part of ADC.
Our model is EEG system including ADS1294 and OP-AMP.
The data format of our firmware has coded with MSB 16-bit of all 24-bit so we have not used LSB 8-bit.
The firmware engineer who is coworker worked in another company have explained about this firmware code for us.
The reason was that the performance of low level in ADC is not good.
But we have not found this comment in your datasheet.
What is your opinion?

Thank you.
Bye.

Best Regards.
SANG RAE LEE.
PANAXTOS.

0 SANG RAE LEE over 7 years ago in reply to SANG RAE LEE

Prodigy 180 points

Hello, Brian Pisani.
Some our posts was moved from original address to another address after your last answer.

1) original address : e2e.ti.com/.../549242
2) moved address : e2e.ti.com/.../2013097

What's problem?
So I have copied our posts not answered yet by you from moved address to original address for your convenience and consistency in Q & A.
Please, refer to below posts.

Thank you.
Good Bye.

Best Regards.
SANG RAE LEE
PANAXTOS.

0 SANG RAE LEE over 7 years ago in reply to SANG RAE LEE

Prodigy 180 points

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae Lee,

The more gain you use, the less of an influence reference noise has on the result. This is because reference noise couples into the system during conversion and if the signal is very large by the time it gets to the converter, the reference noise will be small when compared to the signal. That being said, I see no benefit to using ground as the ADC reference when there is a good internal reference available in the ADS1294. I recommend using the internal 2.4 V reference on the ADS1294.

You have all the channels configured in a "single-ended" configuration with all the negative channel inputs connected to ground. Therefore there is no "common-mode" signal to reject. You may still want simple anti-aliasing RC filters to reject broadband noise. The cutoff frequency may be in the tens of kHz.

Since you are using so much gain, it's possible that the LSBs will all be noise. This is because the noise from the amplifier stages is amplified by the time it gets to the ADC. However, I can't say for sure without doing a detailed analysis of the noise of each of your amplifiers and determining the bandwidth of the entire system. You can do this by finding the bandwidth of the system, and then finding the RMS noise by looking at the amplifier data sheet noise spectral density to calculate the noise. Then be sure to multiply the noise from each amplifier by subsequent gain stages. You can find more information about noise in amplifiers starting on page 44 of the Analog Engineer's Pocket Reference.

By the way, the two URLs you see correspond to the first and second pages of this thread. The thread is long so it was split into different pages. There are arrows at the bottom of each page to navigate between them.

Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian.
Thank you for your help to revise our schematic.
Now we have another question.
In general, we have known that bypass capacitor is used to remove power noise as noise flows into ground.
But there are some capacitor between AVDD(2.5V) and AVSS(-2.5) in your reference and our schematic.
We have refered your reference schematic.
What is the purpose of this capacitors?
Please, reply for this question.
Thank you.
Bye.

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae Lee,

Great question! This is so that any instantaneous current demand from the ADS1298 that produces glitches on the AVDD net can be localized to the device. Imagine that there is a glitch of current demanded by AVDD. At the same time, there will be an glitch injection by AVSS. If there is a capacitor directly shunting those two pins, the change in voltage due to that glitch will be minimized because charge will flow out of one side of the capacitor and into the other.

If instead there is only a capacitor to ground, the charge will be drawn into AVDD from the capacitor and the voltage at AVDD will droop slightly and then eventually charge back up. This could affect nearby sensitive electronics because now AVDD is noisy. Of course this affect is relatively small and it is probably not very important unless you have device nearby that are very sensitive to either their own PSRR (if they also use AVDD as their supply) or capacitively coupling through the PCB layers. It is really a decision for you, the designer, to decide if it is required in oyur application.

Brian

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian.

I have had another urgent job, so my reply is too late.

Now, I have time to spare for reply of your answer.

If so, what is the purpose of capacitors connected between AVDD(+2.5V) and ground(0V)?

Is there any reasons of no capacitors between AVSS(-2.5V) and ground(0V)?

And we have another two questions about ADS1294R and ADS1299.

We have designed PCB based on your schematic review and we are waiting for PCB from PCB manufacturer.

But we have detected some problems in our schematic.

We have mistook pin 1A,1B,1C,1D as unused pins, so we have connected these pins to AVDD.

These pins is only for ADS1296,ADS1296R,ADS1298 and ADS1298R.

What is the predicted problems in our situation?

And the last question is about ADS1299 which is included in our new EEG 8-channel project.

There are no comments about unused DAISY_IN and unused GPIO in datasheet as ADS1294R.

Only comments are "Connect unused analog inputs directly to AVDD."

Are there any connection differences between ADS1294R and ADS1299 in these pins?

Please, refer to below attached file to review our schematic.

PANAXTOS_ADS1299.pptx

We ask your answer as soon as possible.

Thank you.

Good Bye.

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian.

I posted additional questions on last Friday.

But I have not received any notifications or reply from TI's E2E or you.

So, I have worried that you might not receive any notification about my posting from E2E, too.

Please, reply for me about above posting when you receive the notification of this posting.

Thank you.

Good Bye.

Sang Rae.

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Hello Sang Rae,

I apologize for me late reply! There was a holiday in the US at the end of last week.

If you decouple properly between AVDD and AVSS, you should not need any decoupling to ground, although I'm sure there are differences in opinion among other engineers on the topic.

If you make sure the channels corresponding to the pins that you pulled up are disabled in the device you use, then I do not foresee a problem. Since you are using the ADS1294R, there are only 4 channels so it should be fine.

We typically recommend tying DAISY_IN and GPIOs low, but keeping them high will not be a problem. Their behavior is the same between the ADS1299 and ADS1294R.

My only advice on the schematic is that you tie the GPIOs and DAISY_IN low.

Regards,
Brian Pisani

0 SANG RAE LEE over 7 years ago in reply to Brian Pisani

Prodigy 180 points

Hello, Brian.
Thank for your reply.
We have referred TI's ADS1299 datasheet which is that its file name and version are "SBAS499B –JULY 2012–REVISED OCTOBER 2016.".
The description of pin functions not used as GPIO is commented as "Connect to DGND with a ≥10-kΩ resistor if unused.".
Can you explain the difference between this description and your recommendation which was "connect to low.".
We did not used pull-up resistors or pull-down resistors to revise our ADS1294R schematic, but we directly connected those pins(RLDIN, DAISY_IN and unused GPIOs) to AVDD or GROUND as your answer.
We need your wrap-up about this issue.
And, other unused input pins such as BIASIN, BIASINV,BIASREF,SRB1 and SRB2 in our schematic is not connected to any other point, namely, floating.
Although we have received your answer, we ask one more review.
Your answer is very important for our company because we have taken this schematic from other company.
Thank you very much, again.

Best Regards,
Sang Rae Lee.

0 Brian Pisani over 7 years ago in reply to SANG RAE LEE

TI__Mastermind 38745 points

Sang Rae,

The pull-down resistors are a protection in the case that the GPIO accidentally gets configured as an output (it is an input by default). If that happens, the 10 kOhm resistor limits the current that is output. However, if you are careful not to set the GPIO as an output, tying it to GND is not a problem.

Leaving those other pins floating will not affect the performance.

Brian