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DP83620: Loopback in fiber mode

Steven Martin
Prodigy 10 points
Part Number: DP83620

Background:

  1. I have a DP83620 with the FX_EN_Z input strapped low for operating in 100BASE-FX mode.
  2. The PHY is connected to an optical transceiver.
  3. For normal operations, all works as expected with no problems.

Observed Issue:

  1. If I enable internal loopback and keep the signal detect input high, my loopback test passes.
  2. If signal detect is low, the loopback test fails.

Questions:

  1. Is this the expected result by design?
  2. Are there any register settings I can adjust so that the loopback doesn't depend on the state of the signal detect input?

Related Posts I Found:

  1. internal-loopback-mode-of-dp83620: The OP asked about loopback while in fiber mode but the question was not answered.
  2. dp83620-loopback-question: Describes loopback operation in general.
  • 0
    TI__Mastermind 19982 points

    Hi Steven,

    What are the pass/fail conditions for your loopback tests?

    I am checking for more information for question (1) - regarding question (2) do you see a passing result when forcing signal detect with 0x16[9] = '1'?

    Thank you,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 10 points

    For its loopback test, the processor sets the internal loopback bit and sends an Ethernet packet. It expects to receive the same packet back. The test is a pass when the data in the received packet is the same as what was sent. The test is a fail otherwise. With the FX_SD input low, there is no received packet back.

    The datasheet does not describe how the 100BASE-TX signal detect function and the FX_SD input interact when in fiber mode. I assumed they were independent and hadn't fiddled with any of the SD related mode bits. I will test what happens when the SD_FORCE_PMA bit is set and let you know.

    Regards,
    Steven

  • 0 in reply to Steven Martin
    TI__Mastermind 19982 points

    Hi Steven,

    Thanks for clarifying this - this looks to be expected behavior with Signal Detect in 100-FX mode. Please share results when able to test with forced SD.

    Regards,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 10 points

    Setting the SD_FORCE_PMA did not change the outcome.

    Based on the statements in the datasheet that "Due to the nature of the descrambler function, all 100BASE-TX Loopback modes will cause an initial “dead-time” of up to 550 µs during which time no data will be present at the receive MII outputs." (page 24) and "Setting [the LOOPBACK] bit may cause the descrambler to lose synchronization and produce a 500 µs “dead time” before any valid data will appear at the MII receive outputs." (page 70), we also tried adding a delay between setting the loopback bit and and sending the packet. With the delay, the state of the signal detect input doesn't matter and our loopback test passes.

    Can you please explain why the dead time on scrambler would matter for fiber mode since the scrambler should be bypassed? Also is the discrepancy between 500 and 550 in the two dead time descriptions intentional? If not, which one is correct?

    Are there any block diagrams like Figures 7-1 and 7-2 for fiber mode?

  • 0 in reply to Steven Martin
    TI__Mastermind 19982 points

    Hi Steven,

    Which setting is being used on 0x16[8] "SD_OPTION" ? If it is default operation, I share your confusion for why this dead time is causing loopback in fiber mode to fail loopback test. I need to clarify with the team the possible causes for this.

    Unfortunately we do not have figures available for Fiber TX/RX blocks, I will check if there is a comparable PHY that can be referenced for these blocks.

    Thank you,

    Evan