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DS125MB203: Question about DS125MB203

Jimmy Huang
Expert 2855 points
Part Number: DS125MB203

Tool/software:

Hello:

At present, it takes a long time for us to switch between GPON and EPON. We hope to achieve the effect of 1in->2out through the BUFFER DS125MB203. The signal coming in from SFP may be GPON signal or EPON signal. The signal coming in from SFP+ may be XGPON or 10GEPON signal. We originally only received 2 SerDes, but now we hope to receive 4 at the same time through DS125MB203. In this way, whether it is GPON + XGPON or EPON + 10GEPON, I can receive them at the same time.

Attached is the block diagram I drew and the questions I asked. There is also the schematic diagram of my test adapter board. Can you help me check if there is any problem with the principle? It is mainly the capacitive coupling of the front and rear stages, combined with the recommended design in my block diagram.

In addition, is my application feasible and is there any recommended configuration?

DS125MB203-2.pdf    DS125MB203.docx

  • 0
    TI__Mastermind 19900 points

    Hi Jimmy,

    Yes, DS125MB203 can be used as a 1:2 demux in PON applications. Do you need to use the equalization feature of this device, or only the mux/demux switching capability?

    I'm a bit confused by your schematic because it doesn't seem to match your block diagram.

    • Block diagram shows SFP and SFP+ connected to DIN inputs, and host receiver ports connected to SOUT outputs.
    • Schematic shows 2 signal paths: SFP1 --> DS125MB203 --> SFP2 and SFP2 --> DS125MB203 --> SFP1. Mux/demux feature is unused.

    Can you clarify the difference between your block diagram and schematic before I review in detail?

    Best,

    Lucas

  • 0 in reply to Lucas Wolter
    Expert 2855 points

    Hi Lucas：

    Sorry, I didn't make this clear before. This is just a test board for easy debugging. I made two small boards, one is D_IN0->s_OUTA0, and the other is D_IN0->s_OUTB0. I ultimately need to use this multiplexer/demultiplexer. I also want to use the balancing function. These two are two small boards. I want to wait until the experiment is completed before implementing my plan for that diagram.

    7723.DS125MB203-2.pdfDS125MB203-3.pdf

  • 0 in reply to Jimmy Huang
    TI__Mastermind 19900 points

    Hi Jimmy,

    I understand, thank you for the clarification.

    Here is my feedback on the schematics. Note that I only reviewed networks directly connected to DS125MB203. The customer is still responsible for ensuring their design will operate as intended.

    DS125MB203_Test_Board_Schem_Review.pdf

    Can you share the name of the customer for my information?

    Best

    Lucas

  • 0 in reply to Lucas Wolter
    Expert 2855 points

    Hi Lucas:

    Thank you for your sharing!!!

    The customer'name is Grandway, Website is www.grandway.com.cn, Thanks!!!

  • 0 in reply to Jimmy Huang
    TI__Mastermind 19900 points

    Hi Jimmy,

    Thank you for the info!

    Best,

    Lucas

  • 0 in reply to Lucas Wolter
    Expert 2855 points

    Hi Lucas:

    The customer has made changes to the feedback from TI. Currently, the capacitor on VDD has been cut off. The result of my debugging is: I gradually attenuate the optical signal of SFP until bit errors occur. The intensity of this is the same as when I directly connect SFP without REPEATER.
    May I ask if this performance has anything to do with VDD cutting? Thanks!!!

  • 0 in reply to Jimmy Huang
    TI__Mastermind 19900 points

    Hi Jimmy,

    I'm not sure what you mean by VDD cutting. Can you share an updated schematic file or image so I can see what change was made?

    Can you clarify how you are attenuating the optical signal? Are you introducing some type of noise or jitter? Or are you simply decreasing the amplitude?

    Best,

    Lucas