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TSB41BA3F-EP: Unable to connect to bus

Part Number: TSB41BA3F-EP

Tool/software:

Hello,

I am working on a new design to use the TSB41BA3F PHY. During testing, I am able to communicate with the internal PHY registers and configure all of the ports.

However, when I connect the PHY to any other 1394 device (the results are the same for S100,S200, & S400 as well beta and alpha only devices, for all ports for all power classes), the PHY seems to cause continual bus resets, and 'kills' the rest of the bus.

This occurs when bRESET is held high, so that the PHY is not in reset, but the LPS and other pins are held low (so that only the PHY is active, not my custom Link)

I would appreciate any recommendations as to why the PHY is not able to complete the bus initialization / sequence even when there is no attached link.

  • Here is what the bus initialization looks like when I plug in the device into a working bus that consists of a camera and a PCI bus controller node.

    At the very end of the waveform, the bus lines become the first image, posted above

  • Hi,

    With the LPS being remaining low for more than the LPS_DISABLE time (see the LPS terminal definition), then the PHY-LLC interface is put into a low-power disabled state in which the PCLK output is also held inactive. My expectation is that the TSB41BA3F-EP will continue the necessary repeater functions required for normal network operation regardless of the state of the PHY-LLC interface. But I would not expect the PHY to continuously drive the bus reset. Any chance you could share your schematic? You also said besides LPS being hold low, other pins are also being hold low, what are these pins? On the 1394 topology, can you please share what PHY and LINK are on each node?

    Thanks

    David

  • Hi David,

    We were able to resolve our issue today. It turns out that we had swapped the TP+/- pairs in our make shift cable.

    once we confirmed the correct polarity of the TPA/B pairs from the PHY to the other devices, this issue went away.