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Original question:

SN65DSI83-Q1: MIPI DSI lanes for 24 RGB data to LCD

SN65LVDS822: LVDS to RGB24 for DLPDLCR2000EVM

Anton Ogorodnikov
Prodigy 10 points
Part Number: SN65LVDS822
Other Parts Discussed in Thread: DLPDLCR2000EVM, SN65LVDS302, SN65LVDS314, , DLPA1000, DLP2000, DLPC2607, DS90CF384A, DS90CF386, DS90CR286AT-Q1, SN65LVDS311, SN65LVDS301

Tool/software:

Hello!

I'm designing a custom PCB based on Rockchip RK3566 to be connected to DLPDLCR2000EVM. The SoC does not seem to have an RGB24 display interface, but it has a bunch of serial ones - including LVDS.I would like to connect those LVDS pins of the SoC to the DLPDLCR2000EVM via a deserializer. I have found here a few solutions in relation to MIPI DSI to RGB conversion through SN65LVDS822, also I found a few cheaper LVDS receivers: SN65LVDS302 and SN65LVDS314.

Would this be at all a viable solution?

Would you be so kind to recommend the most appropriate solution for my signal conversion IC?

Thanks!

Anton

  • 0
    TI__Genius 17860 points

    Hi Anton,

    The SoC seems to have multiple interfaces. Could you please specify the transmitter (SoC) and receiver (DLP) video interface you would like to use? Then we can looks through the parts for the best solution. And since the conversion components have specified rates, could you also specify the PCLK rate of the video stream?

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    Prodigy 10 points

    Hi Ikram,

    Thanks for the reply!

    The SoC I want to use is Rockchip RK3566. I would like to use LVDS video interface, which RK3566 supports. Here are few characteristics of LVDS support form RK3566 data sheet:
    * Compliant with the TIA/EIA-644-A LVDS specification
    * Support RGB888 and RGB666 input for LVDS interface
    * Support VESA/JEIDA LVDS data format transfer
    It seems to support 0.9V and 1.8V supply voltages.

    DLP2000 will be used as a receiver in combination with DLPC2607 and DLPA1000. 

    For LVDS output on the RK3566 SoC - there is no explicit specs for PCLK, but according to the max resolution on MIPI single channel: 

    Horizontal Total Pixels: 1920 (active) + 280 (blanking) = 2200 pixels
    Vertical Total Lines: 1080 (active) + 45 (blanking) = 1125 lines
    PCLK Rate: 2200 pixels/line × 1125 lines/frame × 60 frames/second = 148.5 MHz

    I am not sure about the exact blanking values - that would be an assumption.

    Thanks for looking into it!

    Best,

    anton

  • 0 in reply to Anton Ogorodnikov
    TI__Genius 17860 points

    Hi Anton,

    You mentioned that the SoC video interface is LVDS. I'm assuming that you are trying to convert LVDS to RGB for DLP input.

    However, these devices do not support the PCLK rate for 148.5 MHz. In that case, I would suggest a two chip solution:



    If you are using a lower resolution and it falls within the range, then you can also use these parts for LVDS to RGB conversion:

    - DS90CF384A
    - DS90CF386
    - DS90CR286AT-Q1
    - SN65LVDS822



    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    Prodigy 10 points

    Hi Ikram,

    Thanks for the suggestions! In fact I am planning to output lower resolution, as DLP2000 is nHD (640x360). Which puts me into 17 MHz range for PCLK. 
    I have seen SN65LVDS822 being referenced a lot in the E2E for LVDS -> RGB converter, including for DLP2000 devices. Is there a reason why SN65LVDS302, SN65LVDS314 are not usually recommended instead of SN65LVDS822?

    Best,

    Anton 

  • +1 in reply to Anton Ogorodnikov
    TI__Genius 17860 points

    Hi Anton, 

    This might be related to the SN65LVDS822 (or DS90CF386) having 4 data + 1 clock lane differential pairs, which would be compatible with the SoC. 

    Whereas the other two devices you mentioned (SN65LVDS302, SN65LVDS314) have 3 data + 1 clock lanes, and they are used with a paired compatible serializer (SN65LVDS301 or SN65LVDS311). 

    Best regards,
    Ikram