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TCAN1043-Q1: nfault pin internal structure and pull low behavior analysis

Scarlett Cao
Expert 3840 points
Part Number: TCAN1043-Q1
Other Parts Discussed in Thread: TCAN1043, , TCAN1043A-Q1

Tool/software:

Hi team,

1. What is the internal architecture of nFault pin? it is open drain or push pull? didnt find it in datasheet

not sure if below description means it is push pull output, pull up to VIO?

2. when TCAN1043 power pin (VCC VIO VSUP ) all in normal range, and Wake pin connect to GND, under which condition nFault pin will pull low?

 

even enter sleep mode, but VCC VIO are within normal supply range, nfault should not be pull low, right？

Thanks

Scarlett

 

  • 0
    TI__Genius 9277 points

    Hi Scarlett,

    Please clarify whether TCAN1043-Q1 or TCAN1043A-Q1 is being used (note the "A" version). Once I have this information, then I can give the correct information for your questions.

    Best,

    Ethan

  • 0 in reply to Ethan Sempsrott
    TI__Expert 3840 points

    Hi Ethan, 

    This is the TCAN1043A-Q1 version. Thanks

    Scarlett

  • 0 in reply to Scarlett Cao
    TI__Genius 9277 points

    Hi Scarlett,

    Thanks for that info.

    1. nFAULT is a push-pull output referenced to VIO.

    2.  When all supplies are on and Wake is not used, TCAN1043A's nFAULT pin can go low for multiple reasons.In this case, when the device has entered Sleep mode, the nFAULT pin becomes high impedance. Some customers have a pull-up resistor on nFAULT for this scenario so the voltage doesn't drop.

    Note that TCAN1043A can enter Sleep mode with both VIO and VCC present (where nFAULT is high impedance). Please reference the state machine diagram Figure 8-4 in the datasheet. 

    Also note that in the non-A version (TCAN1043-Q1) nFAULT in Sleep mode is high if VIO is present. 

    Let me know if that answers your question, or if you still have further questions,

    -Ethan