Dear Team,
Pegatron has some questions about XIO2001. Please see below.
1. How long is the maximum PCI trace length from XIO2001 to PCI slot? They route the trace about 5 inch. Is that OK?
2. Could we provide the reference layout file and reference EEPROM file to Pegatron?
3. Please see the attached figure1 from the reference circuit, is it a resistor? What is the value of pull-up resistor? 10K?
4. Please see the attached figure2 from the referencecircuit, could you tell me how to implement INTX? It seems like different PCI slot has different combination. What is the purpose of these connections?
5. Does TI need to build the EEPROM firmware for customer? Or they need to handle it by themselves?
