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TLK 10232 PHY KR-TO-XAUI

Vladimir Mitrofanov
Prodigy 80 points
Other Parts Discussed in Thread: TLK10232, TLK10034

Hello. We do research about compliance KR to XAUI. Our processor have KR output for 10Gb Ethernet. We developed board with TLK10232 PHY. TLK10232 have input as XAUI.  My question is. Is it possible to use TLK10232 as transceiver? We give KR as input for TLK10232 and TLK10232 gives us KR on backplane side.

  • 0
    TI__Genius 16150 points
    Hi Vladimir,

    The TLK10232 has two different data path: transmit path and receive path. In the first one, the device accepts 4 lanes of XAUI in low speed side and serialized into 1 high speed link of 10GBASE-KR (64/66b). In the second one, the TLK10232 accepts a high speed link of 10GBASE-KR and throw 4 XAUI lanes in LS side (backplane).

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    Prodigy 80 points

    Many thanks. I understood what you write. Before that we test marvell 88x2222 (it works). In transmit path it accept (1000BASE-X or 2000BASE-X or 10GBASE-R or 10GBASE-X2 or 10GBASE-X4) and serialized into high speed link of 10GBASE-KR. We noticed  that XAUI and KR pin to pin compatible. They have the same 8b/10b coding. We decided to check compatibility XAUI and KR or XAUI and KX4. If it is not possible can you explain why in more details. Many Thanks.

    In data sheet I found that TLK10232 can work in 3 modes. It can be used as a XAUI
    to 10GBASE-KR transceiver, as a general-purpose 8b/10b multi-rate 4:1, 2:1, or 1:1 serializer/deserializer,
    or can be used in 1G-KX mode.

    XAUI to 10GBASE-KR transceiver it is clear for me.

    Can you explain 2 last usages.

  • 0 in reply to Vladimir Mitrofanov
    TI__Genius 16150 points
    Hi Vladimir,

    The TLK10232 supports 3 different modes: 1GKX, 10G General Purpose and 10GBASE-KR. 1GKX and 10G General Purpose mode uses 8b/10b coding, on the other hand 10GBASE-KR uses 64b/66b coding. As well, in 10GBASE-KR mode (Clause 73) Auto-Negotiation is enabled, this features selects the best mode of operation 1GKX or 10GBASE-KR, the link partner must me compliant with Auto-Negotiation.
    In 10G General Purpose mode (4:1, 2:1 or 1:1) operates as a normal transceiver.
    On the other hand, this device is able to interface with SFP+ optical modules through 10GBASE-R (10GBase-KR with Link Training and Auto-Negotiation disabled).
    This device does not support 10GBase-X4/X2 neither 2000Base-X).

    Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    Prodigy 80 points

    Luis, many thanks. Can you explain for me.
    KX4 is this the same 10GBase-X4. I read about 10GBase-X4, but it is not clear are this the same as KX4.

    We try to give KX4 as input for TLK10232. As I understood it is possible to use TLK10232 as transceiver in 10G General Purpose mode (4:1, 2:1, 1:1). Is it right?

  • 0 in reply to Vladimir Mitrofanov
    TI__Genius 16150 points
    Hi Vladimir,

    In 10G General Purpose the TLK10232 is able to interface with 10GBASE-KX4 (4 lanes x 3.125Gbps) in the low speed side with 8b/10b coding. Otherwise, in the high speed will throw a serialized data 8b/10b coding. SERDES settings should be adjusted for electrical specs.

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    Prodigy 80 points

    Luis, again many thanks. I will continue my work.

  • 0 in reply to Vladimir Mitrofanov
    Prodigy 80 points

    Hi, Luis!
    We have some questions.
    We configured our phy in KX4 mode, and check it with other transceiver. Rx link up is Ok.
    Now we configured TLK10232 next way:
    1. ST is pulled to 0
    2. MODE_SEL is pulled to 1.
    (As I understood from data sheet this configured TLK10232 in 10G mode)
    3. 0x1E.0001 bit 14, 13 and 12 is set to 1. Doing this we enabling link training and 1 to 1 mode on transmit/receive channel

    For testing link up we plug next loop back module in sfp.

    http://www.alancomputech.com/ibm-lc-loopback-fiber-optic-duplex-wrap-plug-12r9314-12r9314.html

    What else I have to check?
    Do I have enable loop back in TLK10232 in registers?
    We enabled loop back in 0x1E.000B (LOOPBACK_TP_CONTORL) bit 3 and 0 we set to 1.

    We have JTAG from TLK10232 on board how we can use it for debug?

  • 0 in reply to Vladimir Mitrofanov
    TI__Genius 16150 points
    Hi Vladimir,

    To interface with optical modules please disable link training feature. The SERDES settings should be adjusted according to the characteristics system (AC losses, length of traces/cables, etc.):
    HS_SERDES_CONTROL_2, HS_SERDES_CONTROL_3 & HS_SERDES_CONTROL_4

    Thanks,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    Prodigy 80 points

    Hi, Luis!

    Can you answer my question about JTAG?

  • 0 in reply to Vladimir Mitrofanov
    Prodigy 80 points

    Luis, I tried to configure serdes but without results. 

    My question is what the best practice to configure correctly serdes?

  • 0 in reply to Luis Omar Moran
    TI__Intellectual 1315 points
    Good morning, Luis,
    Our TLK10323EVM contains JTAG. At the datasheet I see only short message that JTAG control interfaces to be used for manufacturing tests. What does it mean? There is no detailed information at the web. Is it possible to use JTAG at evaluation work?

    Best regards,
    Dmitry
  • 0 in reply to Vladimir Mitrofanov
    TI__Genius 16150 points
    Hi Vladimir,

    Sorry for the delayed response. The TLK10xxx family is compliant with the IEEE 1149.1 JTAG. To communicate with the TLK10232 trough JTAG interface the timing requirements must be meet. Otherwise, a BSDL file is needed to test the device, please let me verify if we have this file available to share.
    For device manufacturing testing the pin TESTEN is used, in the application this signal is not used since this one is for internal purposes.
    Basically the JTAG port is used to test the cell functionality. To configure the device is needed the MDIO interface to access the registers.

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    Prodigy 80 points

    Hi, Luis.

    I have some more questions.

    I read document "10GBASE-KR Link Optimization with TLK10034 and

    TLK10232" by Markus Zehendner. I decided to test LS and HS loop backs. But as I understand I got bad result. I tried to use PRBSEN pin to test LS/HS link using loopback. I was checking PMA_STATUS_1 bit 2, on device 0x07 AN_STATUS  bit 2 but they are set to 0.  Have I tune serdes params to test LS/HS loopback? What i should done to correctly test it. I created the app to tune TLK10232 by mdio.