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Hello. I'm looking for a TI product that can solve my problem. I have a ASIC chip which has a Ethernet MAC MII interface (10/100 speed) and it needs to talk to a CPU which also has a MAC MII interface & USB2 interface. I've read that you can't connect MAC MII to MAC MII directly - the protocol won't work. Is that true? Basically I need an expert on Ethernet IEEE 802.3.
Otherwise I need some sort of 'bridge' chip to connect the two together. What has TI got?
I think there are two possible solutions:-
1) Use a 2-port ETH Switch chip and connect the PHY's together. Therefore ASIC MAC MII to ETH SW MAC MII, short both PHY outputs together, then ETH SW MAC MII to CPU MAC MII.
2) Use a USB2 to PHY bridge. Though I can't find one that outputs a MAC MII interface. I presume I have to connect it to another single port ETH PHY/MII chip (i.e. similar to option 1 above).
Note: ASIC VIO is 1.8V
Hi Alan,
You are correct, two MAC's cannot be connected together in MII mode. This is possible in RMII, SGMII, and RGMII. Can you provide more information about your application and why you have chosen MII to communicate between ASIC and CPU?
As far as Ethernet solutions, the cleanest solution would be to connect EMAC MII to PHY, PHY to PHY over 10/100Mbps connection, and PHY to CPU MAC. The DP83825I, DP83826E, or DP83822I would be suitable all be suitable for this type of application.
Regards,
Justin
Hello Justin, thanks for the feedback.
> You are correct, two MAC's cannot be connected together in MII mode.
After some more research it may be possible to connect MAC-MAC. As always the answer seems to be "it depends".
Hardware connection: connect Tx to Rx. However the external 25MHz CLK (for 100Mpbs rate) may have to be adjusted to suit timing.
Software/configuration: both MAC's need to be set up as full duplex, 100MBps (hence the 25MHz CLK) and most importantly, needs to be set to MAC-MAC mode rather than default MAC-PHY mode. If the device can't be changed to MAC-MAC than its unlikely to work.
See examples below
http://caxapa.ru/thumbs/414271/Schematic_Design_Guideline%2C_MAC-to-MAC_M.pdf
> Can you provide more information about your application and why you have chosen MII to communicate between ASIC and CPU?
The ASIC is fixed and I can't change that. It only has a MAC MII port. So I have 100Mbps MAC MII port which needs to communicate with a CPU of some description. It seemed obvious at the time to simple connect MAC-MAC but digging deeper this may not be the case. I think the safest option is to use a 2-port Ethernet Switch and tie both PHY's together (back-2-back).
Hello Justin,
> You are correct, two MAC's cannot be connected together in MII mode. This is possible in RMII, SGMII, and RGMII.
Do you have any evidence why direct MII-MII won't work?
What's so special about RMII, SGMII, and RGMII that works directly and not MII?
The reason I ask is that this TI PDF document in 2020 shows direct GMII-GMII works. This isn't much different from MII apart from GMII has a few more data lines for the 1Gbps link rather than a 100Mbps MII link.
Hello Justin
> You are correct, two MAC's cannot be connected together in MII mode. This is possible in RMII, SGMII, and RGMII.
I think I'll abandon the direct MII-MII connection. However you said that it is possible to directly connect RMII, RGMII & SGMII interfaces together - is that applicable with all IEEE 802.3 parts or just a select few Texas Instruments parts? In other words, what evidence is there to say, for example, direction connection of a RGMII-RGMII connection will work? Hardware wise it seems possible but what about the protocol/software?
Hi Alan,
The MII connections are different that RMII, xGMII because in MII the RX_CLK and TX_CLK pins are configured as inputs on the MAC, expecting a clock from the PHY. Without the PHY the two MAC's will not have a clock driving the TX pins on the rising edge.
Regards,
Justin