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DP83822H: EtherCAT Conformance Test - Link Lost A/B counter reset behavior

Part Number: DP83822H
Other Parts Discussed in Thread: TMDXICE110, AMIC110

Hi, 

My customer currently make a EtherCAT Conformance Test with our DP83822H. He has the following question:

According to the test specification you have to observe some counters, which are selected accordingly in TwinCAT. The counters 'Link Lost A/B" always take the value 1 after a reset. I.e. there seems to be a short interruption after the link is established.

I can see this misbehavior on our device as well as on the AMIC board "TMDXICE110". It occurs on every reboot, regardless of whether it is a power reset or soft reset. However, the cause is unclear to me. Can you find out for me why the counters of both ports are incremented by the value '1' at each restart?

Thanks 

Jan 

  • Hi Jan,

    The photo you sent was not fully uploaded to the site. Can you please resend it? Also, how is the counter getting updated? From a PHY POV, I would ask if you can monitor the link LED and see if the PHY is confirmed to be dropping link. If it is dropping link, can you also send me a scope capture of the power supplies ramping up?

    Sincerely,

    Gerome

  • Hi Jan,

    Thanks for sending the photo. I will talk with the team regarding this issue. I expect to have a response by Friday.

    Sincerely,

    Gerome

  • Hi Gerome,

    the picture shows the status of the link LED during the start-up phase.

    As I also can see the beahviour on the "AMIC110 ICE EVM" I decided to monitor the link LED on this board. At the beginning the link signal toggles once but I'm not sure if this is the reason for the issue. In TwinCAT the error counter is incremented when the blinking sequence starts.

     Regards, 

    Marc

  • Hi,

    I guess I got something mixed up. The first picture shows the LINK/ACT status.
    In the following picture you can see the link status and the power supply during the start-up phase.
    I start the application in debug mode. The board is connected to a master. The counter only increments a few seconds after the rising edge from the link status.

    Regards,

    Marc

  • Hi Jan, Marc,

    What is the modes of LED_0 and LED_1 for your application? Also, regarding the photo for LED_0, I see there is a momentary low at the beginning of a long pulsewave, followed by rapid toggling. Is this momentary low coinciding with when the power supplies are ramping up? Or have the supplies been stabilized for some time before?

    In addition, I see you are using register 0x310 to monitor the Link Loss A/B counter. Is this register on the AMIC board or on the PHY?

    Sincerely,

    Gerome

  • Hi Gerome,

    our application does not really matter because I can reproduce the same malfunction (increment of the link lost counter during power-up phase) with the "EtherCAT Full Feature Demo Application" from the "PRU-ICSS EtherCAT Industrial Package" on the AMIC110 ICE EVM. 

    The pictures were taken while the full feature demo was running on the AMIC110 ICE EVM in debug mode. So the supplies have been stabilized for some time before. There is a phy reset implemented in the demo application that could be the reason for the momentary low.

    The register 0310 'Link Lost A/B' is one of the registers of the EtherCAT Slave Controller.

    Sincerely,

    Marc

  • Hi Marc,

    We are looking more extensively with this issue, and will get to you early next week.

    Sincerely,

    Gerome

  • Hi Marc,

    We are still looking into the issue, and will need a few more days. I will try to have a response by end of week.

    Sincerely,

    Gerome

  • Hi Marc,

    Thank you for your patience. Regarding why this shows up:

    The firmware increment the link drop counter if link state is down when firmware starts. Phenomena occurs when firmware starts executing and it has been observed that link is down for both ports even if link was connected prior. Reason for this is the PHY reset that is initiated as start of application. Because of reset state, link will be dropped and renegotiated when PHY comes back up. The reset does not finish by the time the firmware execution starts and so at the time the firmware will see link down for the first time.

    Sincerely,

    Gerome