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Interface

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83TD510E: What is the potential swing levels of DP83TD510E when linking up with link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TD510E
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Ethernet PHY - Functional Safety FIT Rate, FMD and Pin FMA Reports

    James Lee
    James Lee
    We currently do not have Functional Safety FIT Rate, FMD, and Pin FMA Report available for devices released before DP83TC812.
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What different types of Reset are available on a TI Ethernet PHY?

    David Creger
    David Creger
    There are four different types of resets available on a TI Ethernet PHY, each with it's own use case. Pin Reset: Activated by asserting the Reset pin low. Digital core is reset, link up process will restart. All internal registers will reinitialize…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What is a WUP and how does a CAN transceiver send and receive a WUP on the BUS?

    Chris Ayoub
    Chris Ayoub
    Other Parts Discussed in Thread: TCAN1043A-Q1 Introduction Any CAN transceiver that has an Inhibit (INH) pin will also have a sleep mode. The purpose of the INH pin is to be able to automatically turn off the voltage regulator for your MCU/Board. This…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB935-Q1: FPD-Link Data Rate 3Gbps?

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB935-Q1 Does the DS90UB935-Q1 FPD-Link interface run at 3Gbps or 4Gbps?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB954-Q1: CSI-2 Lanes SER vs. DES

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB954-Q1 Does the number of CSI-2 lanes programmed for 954 need to match the number of input lanes for 953/935?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB953-Q1: Imager Data Rate Support

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB953-Q1 ​​​Can the DS90UB953-Q1 support my imager?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: How to force 10/100/1000 Mbps speed in Ethernet PHYs?

    Evan Mayhew
    Evan Mayhew
    Part Number: DP83867E Other Parts Discussed in Thread: USB-2-MDIO To force a specific speed, auto-negotiation is left enabled while disabling advertisements for all non-desired speeds. The scripts to do this in the USB-2-MDIO interface for the DP83867…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] How to read and write Ethernet PHY registers using a Linux terminal?

    David Creger
    David Creger
    There are several different tools available in a Linux environment to read and write registers on a TI PHY. Several of these options are listed below. MII read: This is the only command which can and must be used in U-boot. Stop the autoboot process…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812S-Q1: How to disable 25MHz clock on clkout pin?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83TC812S-Q1 For DP83TC812S/R and DP83TC814-Q1 if clkout pin is not being used to provide a clock signal to another component, then it is recommended to shut down this clock output and reduce its impact on EM emissions. Clkout's output…
    • over 2 years ago
    • Interface
    • Interface forum
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  • Not Answered

    TUSB544: Active Cable Usage Configuration 0 Locked

    552 views
    1 reply
    Latest over 7 years ago
    by Diego Cortes
  • Suggested Answer

    HVDA551-Q1: The maximum rise and fall time of differential output signal(CANH&CANL) 0 Locked

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    DS90UB953-Q1: communicate with DS90UB914A-Q1 0 Locked

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    by Mandeep S
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    DS90LV004: connect two board with LVDS signal 0 Locked

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    by Lee Sledjeski
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    by Miguel Robertson
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    FPC401: How to reset SFP+ /QSFP* 0 Locked

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    HD3SS215: HDMI TDR failure 0 Locked

    548 views
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    by David (ASIC) Liu
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    DS90UB949-Q1: Max. Clock rate DDC Bus of DS90UB949 0 Locked

    580 views
    1 reply
    Latest over 7 years ago
    by Hamzeh Jaradat
  • Suggested Answer

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    733 views
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    by Mario Raffin
  • Suggested Answer

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    826 views
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  • Answered

    DS90UB954-Q1: DS90UB933/DS90UB954 problem(delay/data output) 0 Locked

    1023 views
    5 replies
    Latest over 7 years ago
    by Qianqian
  • Suggested Answer

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    798 views
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    5561 views
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    by Yongqiang Sun
  • Answered

    HD3SS3220: Programming the HD3SS3220 doubt 0 Locked

    1980 views
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    Latest over 7 years ago
    by Juan Jose Frutos Andreu
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