TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB960-Q1: BIST Duration

    ReedKacz
    ReedKacz
    Part Number: DS90UB960-Q1 Hi Team, What is the recommended duration to run the BIST? Thanks Reed
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select correct RGMII delay mode for PHY and MAC?

    Vikram Sharma
    Vikram Sharma
    RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select the crystal's ppm specification for an Ethernet system?

    Vikram Sharma
    Vikram Sharma
    Other Parts Discussed in Thread: DP83TC811 Ethernet data travels effectively from one MAC to another MAC with two Ethernet PHYs in between. Each of these 4 ICs can have their own reference clocks and crystal attached to each is the usual source of this…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867IR: DP83867 digital loopback fail, how to set MII and PCS loopback

    Richard Yang1
    Richard Yang1
    Part Number: DP83867IR Hi Team: Customer side need our help to find the root cause of DP83867 Communication failure issue from one failed board . could you please help to take a look at the attached , customer need to know How to enable MII and PCS…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] RGMII Timing - Align and Shift mode

    Gokul Koraganji
    Gokul Koraganji
    Definitions: TX_DATA[3:0], TX_CLK (naming of TI Ethernet PHYs) are transmitted by the MAC/(Repeater PHY) and RX_DATA[3:0], RX_CLK (naming of TI Ethernet PHYs) are transmitted by Ethernet PHY. S.No Mode Definition 1 PHY: RX Align…
    • over 3 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    DP83822IF: Fast link down function 0 Locked

    377 views
    11 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Not Answered

    DS90UB913A-Q1: Issues interfacing DS90UB913A Serializer to DS90UB960 Deserializer 0 Locked

    303 views
    1 reply
    Latest over 4 years ago
    by Hamzeh Jaradat
  • Answered

    DP83867IR: Pre-emphasis of DP83867IR 0 Locked

    478 views
    14 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DS92LV0422: About Transition time from "Active" to "OSC Output" 0 Locked

    347 views
    2 replies
    Latest over 4 years ago
    by Hide
  • Answered

    DS92LV0422: About PDB 0 Locked

    406 views
    2 replies
    Latest over 4 years ago
    by Hide
  • Answered

    DP83822I: DP83822I clock out specification 0 Locked

    352 views
    6 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Answered

    TUSB4020BI: Pulse width 0 Locked

    1065 views
    21 replies
    Latest over 4 years ago
    by Yuta Nishie
  • Answered

    TPS65988EVM: I want to change the role of port A according to the connection of port B. 0 Locked

    293 views
    2 replies
    Latest over 4 years ago
    by Yoshifumi Kakimoto
  • Answered

    TPS25830-Q1: Interface - INTERNAL forum 0 Locked

    362 views
    5 replies
    Latest over 4 years ago
    by Kuno Wu
  • Answered

    TDP158: Please show the test results of the open / short test. 0 Locked

    341 views
    8 replies
    Latest over 4 years ago
    by Hitoshi Koide
  • Answered

    DP83848I: DP83848I Design and Debug problems 0 Locked

    416 views
    17 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83867IS: Does the Linux driver of DP83867IS have version 3.10 0 Locked

    569 views
    5 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Suggested Answer

    DP83869HM: Can device be used as RGMII - SGMII between 2 MACs 0 Locked

    316 views
    5 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83869HM: Ripple Requirement of DP83869HMRGZT 0 Locked

    255 views
    2 replies
    Latest over 4 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DS90UB954-Q1EVM: loss of lock during BIST test 0 Locked

    687 views
    15 replies
    Latest over 4 years ago
    by Shruti More
  • Not Answered

    DS90UB954-Q1: The setting guidebook of testing Eye pattern 0 Locked

    150 views
    1 reply
    Latest over 4 years ago
    by Shruti More
  • Suggested Answer

    TUSB8044A: Can I use TUSB8044A to know the signal quality is good or not? 0 Locked

    375 views
    6 replies
    Latest over 4 years ago
    by JMMN
  • Suggested Answer

    TUSB2E22: Level converter 0 Locked

    343 views
    1 reply
    Latest over 4 years ago
    by JMMN
  • Answered

    SN65HVD10: figure 18/19 clarification in datasheet 0 Locked

    221 views
    2 replies
    Latest over 4 years ago
    by Michael T Schneider
  • Suggested Answer

    DS250DF810: SMBus mode select 0 Locked

    241 views
    1 reply
    Latest over 4 years ago
    by Rodrigo Natal
<>