Dear team,
We are using this part ( SN74LVC573AQ1) in one of our projects,
1. We want to know if the latch output enable pins are left open and Latch enable is low, what will be the output state of the Latch - upon Power State (D input will be connected High)
2. If the latch output enable pins are low and Latch enable is low, what will be the output state of the Latch - upon Power on state (D input will be connected High)
3. Please also let us know whether Output Enable, Latch Enable and D inputs have any default internal pull-ups or pull-downs
