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LSF0102 level shift when data is transimitted

Other Parts Discussed in Thread: LSF0102

Hi dear expert,

My customer ZTE met some problem when using LSF0102. Their application is 1.2V and 3.3V bidirectional level shifting, the data rate is 25MHz. The schematic is as below:

During test, they found if the data is not sent, the 1.2V and 3.3V level are correct; if data is sent, the 3.3V is only 1.8V. 

Have you met this phenomenon? Can you please give us any suggestion or advice.

thanks very much for your support.

BR,

Joyce

  • Joyce,

    I've notified the appropriate applications engineer. They will get back to you. Thanks.

    Best Regards,
    Nirav
  • HI Nirav,

    Thanks a lot for your reply.

    Here is more information from customer.

    The application is :MAC(1.2V)<--->MDC_buffer<--->PHY(3.3V)

    The customer schematic is as below:

    TRUE--(grey line) means not installed. The second pic is Pin 8 connection.

    When the signal is transmitted, 3.3V is pulled down to 1.8V. While if signal is not transmitted, 3.3V is normal.

    This project will soon to mass production. Customers wish we could response quickly.

    Thanks a lot for your support! Looking forward to you reply.

    BR,

    Joyce

  • Hi Joyce,

    The one issue I see from the schematic is the enable pin not connected to the 200Kohm. The 3.3V supply to the VrefB has 200Kohm resistor , could you connect that to enable as well ?
    does the driver have the capability to sustain the IOL current during the low ?
  • Hi Shreyas,
    The second snapshot i posted is Pin 8 connection. pin 8 is EN is connected to 200ohm to 3.3V.

    what do you mean by "does the driver have the capability to sustain the IOL current during the low ?"
    the driver, which do you refer to?

    Is the issue related to pull up resistor? At 3.3V side, the pull up resistor is 332ohm. Is this ok?

    Customer want to check can we reproduce this on our demo board? They are in quite a hurry.

    thanks very much for your support!
  • Hi Shreyas,

    the 1.2V side, the Iol is +/- 4mA OD gate.
    the 3.3V side, the Iol is +/-2mA OD gate.

    BR,
    Joyce
  • Hi Joyce ,

    I would suspect the pullup resistor is generating large amount of IOL current into the 1.2V and 3.3V side above the rated capabilities of the part. 1.2V / 100ohm = 12mA and 3.3V /332 = 10mA which is above the 2/4mA of IOL drive of the OD gates . Is it possible for changing the resistors to 1kohm ?
    what is the total capacitance on the board /traces? 25Mhz can be doable with 1kohm ,but reducing capacitance would be essential .
    Also , " +/- " doesnt indicate they are Open drain devices . Are they OD or push pull capable ?
  • HI Shreyas,
    ZTE feedback they are OD gate.
    ZTE also tried to change the pull up resistor value:

    1.1.2V side,100ohm;3.side3V side,332ohm。
    2.1.2V side,100ohm;3.3V side,1kohm。
    3.1.2V side,50oohm;3.3V side,1kohm。
    4.1.2V side,332ohm;3.3V side,332ohm。

    All four cases, 3.3V all tie to 1.8V.

    Do you have further advice?? Looking forward to your reply.

    BR,
    Joyce
  • Hi Shreyas,

    Today ZTE also tried change pull up resistor to 1K for both 1.2V and 3.3V side. and 3.3V side voltage level is around 2V, but 1.2V is pulled to 1.8V.

    ZTE confirms that the input and output circuit is all OD gate. 1.2V side, is MAC chip, the IOL is +/-4mA; 3.3V side is PHY chip, +/-2mA, all OD gate.

    About other pull up resistor values, ZTE have done tests:

    1.1.2V,100ohm;3.3v,240ohm//  3.3V side high level is around 2V.
    2.1.2V,100ohm;3.3V,100ihm//3.3V side high level is 3.3V, but low level is 2V, the data is not correct. 
    3.1.2V,200ohm;3.3V,200ohm//not right either. 

    All the test are done with PHY side disconnected, with BP not connected. See attached schematic:


    Since customers have done many trials, they hope we could reproduce it at our lab, can you please help on it? Just test BP left side circuit. This project has been suspended because of LSF0102, they hope we could help solve this issue quickly.

    Another question is, if customer doesn't need level shifting function, can LSF0102 transmit 3.3V to 3.3V without level shifting?

    thanks very much!

    BR, Joyce

  • Hi Shreyas,
    We have identified the problem, it is because En pin is not connected to Vref_B. After shorting these two pins, and change the pull up the resistor at 1.2V to 240ohm, 3.3V to 1Kohm. The voltage translation is normal.

    However, this requires the board change. ZTE didn't plan to change the board design and they could use this chip as switch, i.e. change the mac output to 3.3V, and LSF0102 both sides level is 3.3V. They have done the test, it works.

    So we want to double check with you, whether both sides at the same voltage is supported in LSF0102. IS there any risk using this application.
    i also check e2e community, there is a link says it supports. e2e.ti.com/.../483199

    Please kindly double confirm.

    thanks very much!!
    BR,
    Joyce
  • Hi Joyce ,

    Glad to know it works as I had suspected either the EN connection through the 200kohm resistor impacts the output level or the pullup resistors (most likely affects the Vol level ).
    I had tested in lab for 3.3V to 3.3V which worked , however , please remember that the VrefA and VrefB was at different levels >1V . The signals at the input should go up to 3.3V equal to VrefA .
  • Hi Shreyas,
    Thanks for your reply.
    Yes, customer will change the VrefA level from 1.2V to 3.3V. For long term use, is there any quality risk for 3.3V to 3.3V?

    Plus, customer is interested in the internal structure of LSF0102. Can you kindly share?

    thanks a lot!
    BR,
    Joyce
  • Hi Joyce ,

    This device is a passive translator with the internal structure as mentioned in the forum post above . They are bunch of FETs connected by common gate to the controlling FET.
    To avoid signal integrity issues , the VrefA should be ~1V lower than VrefB , so VrefA @ 3.3V and VrefB > 4.3V should be good.