TMS570LC4357: Cannot get SCI module working with parity bit

hongbo Yang

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

I want to enable parity bit (whatever odd or even) for SCI module, I was using generated code from HalCoGen on LAUNCHXL-TMS570LC43

Using SCI1 and SCI3, SCI1 output via XDSv110, and SCI3 output via USB-bridge.

Both of them can only be received correctly via parity none option: picocom -b 1500000 -y n -d 8 -p 1 /dev/ttyACM0

with picocom -y e or picocom -y o will receive garbage results

Following is the sciInit generated from HalCoGen

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void sciInit(void)
{
/* USER CODE BEGIN (2) */
/* USER CODE END */
    /** @b initialize @b SCI1 */
    /** - bring SCI1 out of reset */
    sciREG1->GCR0 = 0U;
    sciREG1->GCR0 = 1U;
    /** - Disable all interrupts */
    sciREG1->CLEARINT    = 0xFFFFFFFFU;
    sciREG1->CLEARINTLVL = 0xFFFFFFFFU;
    /** - global control 1 */
    sciREG1->GCR1 =  (uint32)((uint32)1U << 25U)  /* enable transmit */
                  | (uint32)((uint32)1U << 24U)  /* enable receive */
                  | (uint32)((uint32)1U << 5U)   /* internal clock (device has no clock pin) */
                  | (uint32)((uint32)(1U-1U) << 4U)  /* number of stop bits */
                  | (uint32)((uint32)1U << 3U)  /* even parity, otherwise odd */
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

void sciInit(void)
{
/* USER CODE BEGIN (2) */
/* USER CODE END */

    /** @b initialize @b SCI1 */

    /** - bring SCI1 out of reset */
    sciREG1->GCR0 = 0U;
    sciREG1->GCR0 = 1U;

    /** - Disable all interrupts */
    sciREG1->CLEARINT    = 0xFFFFFFFFU;
    sciREG1->CLEARINTLVL = 0xFFFFFFFFU;

    /** - global control 1 */
    sciREG1->GCR1 =  (uint32)((uint32)1U << 25U)  /* enable transmit */
                  | (uint32)((uint32)1U << 24U)  /* enable receive */
                  | (uint32)((uint32)1U << 5U)   /* internal clock (device has no clock pin) */
                  | (uint32)((uint32)(1U-1U) << 4U)  /* number of stop bits */
                  | (uint32)((uint32)1U << 3U)  /* even parity, otherwise odd */
                  | (uint32)((uint32)1U << 2U)  /* enable parity */
                  | (uint32)((uint32)1U << 1U);  /* asynchronous timing mode */

    /** - set baudrate */
    sciREG1->BRS = 2U;  /* baudrate */

    /** - transmission length */
    sciREG1->FORMAT = 8U - 1U;  /* length */

    /** - set SCI1 pins functional mode */
    sciREG1->PIO0 = (uint32)((uint32)1U << 2U)  /* tx pin */
                 | (uint32)((uint32)1U << 1U); /* rx pin */

    /** - set SCI1 pins default output value */
    sciREG1->PIO3 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI1 pins output direction */
    sciREG1->PIO1 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI1 pins open drain enable */
    sciREG1->PIO6 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI1 pins pullup/pulldown enable */
    sciREG1->PIO7 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI1 pins pullup/pulldown select */
    sciREG1->PIO8 = (uint32)((uint32)1U << 2U)  /* tx pin */
                 | (uint32)((uint32)1U << 1U);  /* rx pin */

    /** - set interrupt level */
    sciREG1->SETINTLVL = (uint32)((uint32)0U << 26U)  /* Framing error */
                      | (uint32)((uint32)0U << 25U)  /* Overrun error */
                      | (uint32)((uint32)0U << 24U)  /* Parity error */
                      | (uint32)((uint32)0U << 9U)  /* Receive */
                      | (uint32)((uint32)0U << 8U)  /* Transmit */
                      | (uint32)((uint32)0U << 1U)  /* Wakeup */
                      | (uint32)((uint32)0U << 0U);  /* Break detect */

    /** - set interrupt enable */
    sciREG1->SETINT = (uint32)((uint32)0U << 26U)  /* Framing error */
                   | (uint32)((uint32)0U << 25U)  /* Overrun error */
                   | (uint32)((uint32)0U << 24U)  /* Parity error */
                   | (uint32)((uint32)0U << 9U)  /* Receive */
                   | (uint32)((uint32)0U << 1U)  /* Wakeup */
                   | (uint32)((uint32)0U << 0U);  /* Break detect */

    /** - initialize global transfer variables */
    g_sciTransfer_t[0U].mode   = (uint32)0U << 8U;
    g_sciTransfer_t[0U].tx_length = 0U;
	g_sciTransfer_t[0U].rx_length = 0U;

    /** - Finaly start SCI1 */
    sciREG1->GCR1 |= 0x80U;





    /** @b initialize @b SCI3 */

    /** - bring SCI3 out of reset */
    sciREG3->GCR0 = 0U;
    sciREG3->GCR0 = 1U;

    /** - Disable all interrupts */
    sciREG3->CLEARINT    = 0xFFFFFFFFU;
    sciREG3->CLEARINTLVL = 0xFFFFFFFFU;

    /** - global control 1 */
    sciREG3->GCR1 =  (uint32)((uint32)1U << 25U)  /* enable transmit */
                  | (uint32)((uint32)1U << 24U)  /* enable receive */
                  | (uint32)((uint32)1U << 5U)   /* internal clock (device has no clock pin) */
                  | (uint32)((uint32)(1U-1U) << 4U)  /* number of stop bits */
                  | (uint32)((uint32)1U << 3U)  /* even parity, otherwise odd */
                  | (uint32)((uint32)1U << 2U)  /* enable parity */
                  | (uint32)((uint32)1U << 1U);  /* asynchronous timing mode */

    /** - set baudrate */
    sciREG3->BRS = 2U;  /* baudrate */

    /** - transmission length */
    sciREG3->FORMAT = 8U - 1U;  /* length */

    /** - set SCI3 pins functional mode */
    sciREG3->PIO0 = (uint32)((uint32)1U << 2U)  /* tx pin */
                 | (uint32)((uint32)1U << 1U); /* rx pin */

    /** - set SCI3 pins default output value */
    sciREG3->PIO3 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI3 pins output direction */
    sciREG3->PIO1 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI3 pins open drain enable */
    sciREG3->PIO6 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI3 pins pullup/pulldown enable */
    sciREG3->PIO7 = (uint32)((uint32)0U << 2U)  /* tx pin */
                 | (uint32)((uint32)0U << 1U); /* rx pin */

    /** - set SCI3 pins pullup/pulldown select */
    sciREG3->PIO8 = (uint32)((uint32)1U << 2U)  /* tx pin */
                 | (uint32)((uint32)1U << 1U);  /* rx pin */

    /** - set interrupt level */
    sciREG3->SETINTLVL = (uint32)((uint32)0U << 26U)  /* Framing error */
                      | (uint32)((uint32)0U << 25U)  /* Overrun error */
                      | (uint32)((uint32)0U << 24U)  /* Parity error */
                      | (uint32)((uint32)0U << 9U)  /* Receive */
                      | (uint32)((uint32)0U << 8U)  /* Transmit */
                      | (uint32)((uint32)0U << 1U)  /* Wakeup */
                      | (uint32)((uint32)0U << 0U);  /* Break detect */

    /** - set interrupt enable */
    sciREG3->SETINT = (uint32)((uint32)1U << 26U)  /* Framing error */
                   | (uint32)((uint32)1U << 25U)  /* Overrun error */
                   | (uint32)((uint32)1U << 24U)  /* Parity error */
                   | (uint32)((uint32)0U << 9U)  /* Receive */
                   | (uint32)((uint32)1U << 1U)  /* Wakeup */
                   | (uint32)((uint32)1U << 0U);  /* Break detect */

    /** - initialize global transfer variables */
    g_sciTransfer_t[2U].mode   = (uint32)0U << 8U;
    g_sciTransfer_t[2U].tx_length = 0U;
	g_sciTransfer_t[2U].rx_length = 0U;

    /** - Finaly start SCI3 */
    sciREG3->GCR1 |= 0x80U;




/* USER CODE BEGIN (3) */
    // sciREG3->SETINT |= (uint32)(((uint32)1U << 16U) | ((uint32)1U << 8U));  /* SET TX DMA / SET TX INT*/
/* USER CODE END */
}

over 2 years ago

0 jagadish gundavarapu over 2 years ago

TI__Guru 63035 points

HI Hongbo,

Just now i tested with "Docklight" tool and i too observed the same behavior if i enable Parity at controller (i.e., The tool is detecting the data irrespective of parity enable at tool side).

But did you test the below condition?

Don't enable parity on controller side and enable parity on tool side then the communication should be failed.

I mean it is fine as long as the controller generating parity from its output when we enabled parity, if possible check controller SCI output with CRO or logic analyzer with parity and without parity, the parity bit should be added at end of each character if we enabled the parity.

Thanks & Regards,

Jagadish.

0 hongbo Yang over 2 years ago in reply to jagadish gundavarapu

Intellectual 310 points

Hi Jagadish

The situation is , either I enabled parity or not at controller ( with HalCoGen ), the tool side can receive data correctly without parity option, and cannot receive correct data with parity option in tool side.

I guess the parity bit is not generating on controller side?

0 jagadish gundavarapu over 2 years ago in reply to hongbo Yang

TI__Guru 63035 points

i Hongbo,

I will attach my code, it is working. Just try to compare this code with your code and let me know whether you find any differences.

SCI_PARITY_LC4357.zip

Thanks & Regards,
Jagadish.

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TMS570LC4357: Cannot get SCI module working with parity bit