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Dear Team,
I am using TMS570LC4357 MCU in my project.LIN Controller is not generating parity bits.
I configured LIN1 to be a master and it is connected to a Vector LIN Hardware (slave)
a) If i generate Header using ID 0x17 ,Vector device throws ID/Parity Error
As per the calculation , the parity bit P0 =0 , P1 =1 , But Hardware is generating Both the Bits as 0 , P0,P1 =0;(Observed in oscilloscope)
b) If i use other ID , Ex: 37 , the Vector Device gets the header correctly and responds with the data
As per the calculation , the parity bit P0 =0 , P1 =0 , Hardware is generating Both the Bits as 0 , P0,P1 =0;
observation :
LIN Controller is not doing parity calculation properly.
LIN MCU Configuration for your reference
/** - Release from reset */
linREG1->GCR0 = 1U;
/** - Start LIN configuration
* - Keep state machine in software reset
*/
linREG1->GCR1 = 0U;
/** - Enable LIN Mode */
linREG1->GCR1 = 0x40U;
/** - Setup control register 1
* - Enable transmitter
* - Enable receiver
* - Stop when debug mode is entered
* - Disable Loopback mode
* - Disable / Enable HGENCTRL (Mask filtering with ID-Byte)
* - Use enhance checksum
* - Enable multi buffer mode
* - Disable automatic baudrate adjustment
* - Disable sleep mode
* - Set LIN module as master
* - Enable/Disable parity
* - Disable data length control in ID4 and ID5
*/
linREG1->GCR1 |= 0x03000C60U
| (uint32)((uint32)1U << 12U)
/* | (uint32)((uint32)0U << 17U) // Added newly*/
| (uint32)((uint32)1U << 2U);
/** - Setup maximum baud rate prescaler */
linREG1->MBRSR = (uint32)4507U;
/** - Setup baud rate prescaler */
linREG1->BRS = (uint32)324U;
/** - Setup RX and TX reception masks */
linREG1->MASK = ((uint32)((uint32)0xFFU << 16U) | (uint32)0xFFU);
/** - Setup compare
* - Sync delimiter
* - Sync break extension
*/
linREG1->COMP = ((uint32)((uint32)(1U - 1U) << 8U) | ((uint32)13U - 13U));
/** - Setup response length */
linREG1->FORMAT = ((linREG1->FORMAT & 0xFFF8FFFFU) | (uint32)(((uint32)8U - 1U) << 16U));
/** - Set LIN pins functional mode
* - TX
* - RX
* - CLK
*/
linREG1->PIO0 = ((uint32)4U | (uint32)2U | (uint32)0U);
/** - Set LIN pins default output value
* - TX
* - RX
* - CLK
*/
linREG1->PIO3 = ((uint32)0U | (uint32)0U | (uint32)0U);
/** - Set LIN pins output direction
* - TX
* - RX
* - CLK
*/
linREG1->PIO1 = ((uint32)4U | (uint32)0U | (uint32)0U);
/** - Set LIN pins open drain enable
* - TX
* - RX
* - CLK
*/
linREG1->PIO6 = ((uint32)0U | (uint32)0U | (uint32)0U);
/** - Set LIN pins pullup/pulldown enable
* - TX
* - RX
* - CLK
*/
linREG1->PIO7 = ((uint32)0U | (uint32)0U | (uint32)0U);
/** - Set LIN pins pullup/pulldown select
* - TX
* - RX
* - CLK
*/
linREG1->PIO8 = ((uint32)4U | (uint32)2U | (uint32)1U);
/** - Set interrupt level
* - Bit error level
* - Physical bus error level
* - Checksum error level
* - Inconsistent sync field error level
* - No response error level
* - Framing error level
* - Overrun error level
* - Parity error level
* - Identifier level
* - RX level
* - TX level
* - Timeout after 3 wakeup signals level
* - Timeout after wakeup signal level
* - Timeout level
* - Wakeup level
* - Break detect level
*/
linREG1->SETINTLVL = ((uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U);
/** - Set interrupt enable
* - Enable/Disable bit error
* - Enable/Disable physical bus error level
* - Enable/Disable checksum error level
* - Enable/Disable inconsistent sync field error level
* - Enable/Disable no response error level
* - Enable/Disable framing error level
* - Enable/Disable overrun error level
* - Enable/Disable parity error level
* - Enable/Disable identifier level
* - Enable/Disable RX level
* - Enable/Disable TX level
* - Enable/Disable timeout after 3 wakeup signals level
* - Enable/Disable timeout after wakeup signal level
* - Enable/Disable timeout level
* - Enable/Disable wakeup level
* - Enable/Disable break detect level
*/
linREG1->SETINT = ((uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U);
/** - Finaly start LIN */
linREG1->GCR1 |= 0x00000080U;
Hello Mani,
The device HW doesn't generates the parity bits. After PARITY_ENA bit in GCR2 is set, the bit6/bit7 of ID field are used as parity of the ID. Otherwise, those 2 bits are used for ID. The parity has to be calculated by SW using the following formula:
In your case, it is better to write 8b10010111 ( 2 parity bit + 0x17 ID) to the ID field directly. I am sorry for the inconvenience.