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AM2634: RAM/Flash configuration, speed, and interface

Lenio Cacula
Genius 16460 points
Part Number: AM2634

The AM2634 shows the General Purpose Memory controller with an option of 16-bit parallel data bus (22-b address) under media and storage.

  1. Does that mean that code cannot be executed from this parallel port?
  2. Is correct to assume that code can be executed from QSPI and if so,
  3. at what speed?
  4. When transferring code from external flash to RAM on the fly, are other portions of the code still able to run?
  5. Do we have any metrics that compare speed of execution of RAM when multiple transfers are made from flash?

Thank you!

  • +1
    TI__Mastermind 49275 points

    Hi Lenio,

    1. Does that mean that code cannot be executed from this parallel port?

    [MW] Code cam be executed through the GPMC interface. We have customers to use the GPMC to interface with PSRAM for code execution and data storage.

    1. Is correct to assume that code can be executed from QSPI and if so,

    [MW] AM263x does not support the XIP from QSPI flash

    1. at what speed?

    [MW] Unfortunately we do not have the benchmark numbers yet. Keep in mind, the benchmark numbers are highly depending on the flash you used and the locality of the code executing, since the instructional cache can be enabled.

    1. When transferring code from external flash to RAM on the fly, are other portions of the code still able to run?

    [MW] In theory, those two things can happen in parallel, if the flash to memory copy is using DMA and the R5F core is running from its own TCM.

    1. Do we have any metrics that compare speed of execution of RAM when multiple transfers are made from flash?

    [MW] Unfortunately, we do not have such benchmark at this point.

    Best regards,

    Ming