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Hello,
I understand that the purpose of Acquisition Time is to allow the S+H (Sample and Hold) capacitor to reach the voltage level of the external circuit.
The AM2434 DataSheet and Technical Reference Manual (TRM) both explain how to set this (through SampleDelay), with the maximum setting being 257 SMPL_CLK and the minimum as 2 SMPL_CLK.
However, I can't find any explanations or formulas to calculate the appropriate Acquisition Time.
Should I base everything on experimentation?
Hi Ken,
Apologies for the delayed response. The Aquisition window is usually based on the sampling rate requirement for the given input signal, and hence can be made so that the Sample and hold circuit charges enough, while the signal itself doesn't change while sampling. We have requested a HW expert to return for better response.
thanks
Madhava
Hi Ken,
You can referrer to this application note for C2000 ADCs to better understand how to select the acquisition window based on the characteristics of the signal you are trying to observe. https://www.ti.com/lit/SPRACT6
Here are the parameters for the AM2434 ADC:
Parameter | Value | Notes |
vfs | 1.8 | ADC reference voltage |
Vermax (uV) | 219.7266 | Max sampling error |
Tsh | User selected based on application sample rate reqs | |
Ron | 200 | Sampling switch on resistance |
Ch | 5.5pF | Sample and hold capacitor |
Cp | 5.5pF | on die parasitic capacitance |
Best Regards,
Brian