Hello,
We want to receive 1024 bytes of data from FPGA.Its taking aroung 480 us in TM4C when system clock is 30mhz inGPMODE 16 BIT configuration.
Through oscilloscope we founded out the frequencies of signals(clk,read enable,raed,write) and between each raed enables the delays(timing between two read enables) are occuring,how to avoid it or reduce it if possible.........
Our final requirement is to read 1024 bytes in 200us.Can we achieve this in GPMOde ............
2)What is the time period if system clock is 120mhz and SysTickPeriodSet(100);(We are using to calculatre timing of a loop in gpio interrupt....)
ui32Value1 = SysTickValueGet();=5
{
GPIO interrupt
}
ui32Value1 = SysTickValueGet();=58
How the timing can be estimated,Any forum member please replay.
Regards,
Krishnan