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EPI General Purpose Mode setup and use

Hi,

I am using a TM4C129NCPDT on a custom board. I have the EPI connected to an FPGA with data size 16 and address size 4.

Initial tests show that the read, write and clock signals are as expected but the address lines do not change state.

There don't seem to be many examples involving EPI - please would someone check my initialisation code, and that I have undestood how to use the EPI.

Thanks, Richard

//---------------------------------------------------------
void initEPI(void)
{
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);	//
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);	//

    SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_EPI0))	//wait for it to be ready
    {
    }

	MAP_GPIOPinConfigure(GPIO_PK0_EPI0S0);
	GPIOPinTypeEPI(GPIO_PORTK_BASE, GPIO_PIN_0);	//D0
	MAP_GPIOPinConfigure(GPIO_PK1_EPI0S1);
	GPIOPinTypeEPI(GPIO_PORTK_BASE, GPIO_PIN_1);	//D1
	MAP_GPIOPinConfigure(GPIO_PK2_EPI0S2);
	GPIOPinTypeEPI(GPIO_PORTK_BASE, GPIO_PIN_2);	//D2
	MAP_GPIOPinConfigure(GPIO_PK3_EPI0S3);
	GPIOPinTypeEPI(GPIO_PORTK_BASE, GPIO_PIN_3);	//D3
	MAP_GPIOPinConfigure(GPIO_PC7_EPI0S4);
	GPIOPinTypeEPI(GPIO_PORTC_BASE, GPIO_PIN_7);	//D4
	MAP_GPIOPinConfigure(GPIO_PC6_EPI0S5);
	GPIOPinTypeEPI(GPIO_PORTC_BASE, GPIO_PIN_6);	//D5
	MAP_GPIOPinConfigure(GPIO_PC5_EPI0S6);
	GPIOPinTypeEPI(GPIO_PORTC_BASE, GPIO_PIN_5);	//D6
	MAP_GPIOPinConfigure(GPIO_PC4_EPI0S7);
	GPIOPinTypeEPI(GPIO_PORTC_BASE, GPIO_PIN_4);	//D7
	MAP_GPIOPinConfigure(GPIO_PA6_EPI0S8);
	GPIOPinTypeEPI(GPIO_PORTA_BASE, GPIO_PIN_6);	//D8
	MAP_GPIOPinConfigure(GPIO_PA7_EPI0S9);
	GPIOPinTypeEPI(GPIO_PORTA_BASE, GPIO_PIN_7);	//D9
	MAP_GPIOPinConfigure(GPIO_PG1_EPI0S10);
	GPIOPinTypeEPI(GPIO_PORTG_BASE, GPIO_PIN_1);	//D10
	MAP_GPIOPinConfigure(GPIO_PG0_EPI0S11);
	GPIOPinTypeEPI(GPIO_PORTG_BASE, GPIO_PIN_0);	//D11
	MAP_GPIOPinConfigure(GPIO_PM3_EPI0S12);
	GPIOPinTypeEPI(GPIO_PORTM_BASE, GPIO_PIN_3);	//D12
	MAP_GPIOPinConfigure(GPIO_PM2_EPI0S13);
	GPIOPinTypeEPI(GPIO_PORTM_BASE, GPIO_PIN_2);	//D13
	MAP_GPIOPinConfigure(GPIO_PM1_EPI0S14);
	GPIOPinTypeEPI(GPIO_PORTM_BASE, GPIO_PIN_1);	//D14
	MAP_GPIOPinConfigure(GPIO_PM0_EPI0S15);
	GPIOPinTypeEPI(GPIO_PORTM_BASE, GPIO_PIN_0);	//D15
	MAP_GPIOPinConfigure(GPIO_PL0_EPI0S16);
	GPIOPinTypeEPI(GPIO_PORTL_BASE, GPIO_PIN_0);	//A0
	MAP_GPIOPinConfigure(GPIO_PL1_EPI0S17);
	GPIOPinTypeEPI(GPIO_PORTL_BASE, GPIO_PIN_1);	//A1
	MAP_GPIOPinConfigure(GPIO_PL2_EPI0S18);
	GPIOPinTypeEPI(GPIO_PORTL_BASE, GPIO_PIN_2);	//A2
	MAP_GPIOPinConfigure(GPIO_PL3_EPI0S19);
	GPIOPinTypeEPI(GPIO_PORTL_BASE, GPIO_PIN_3);	//A3
	MAP_GPIOPinConfigure(GPIO_PB3_EPI0S28);
	GPIOPinTypeEPI(GPIO_PORTB_BASE, GPIO_PIN_3);	//WR
	MAP_GPIOPinConfigure(GPIO_PP2_EPI0S29);
	GPIOPinTypeEPI(GPIO_PORTP_BASE, GPIO_PIN_2);	//RD
	MAP_GPIOPinConfigure(GPIO_PK5_EPI0S31);
	GPIOPinTypeEPI(GPIO_PORTK_BASE, GPIO_PIN_5);	//CLK

    EPIModeSet(EPI0_BASE, EPI_MODE_GENERAL);	//general mode
    EPIDividerSet(EPI0_BASE, 10);				//1=60MHz, 10=10MHz, 119=1MHz
    EPIConfigGPModeSet(EPI0_BASE,
    		EPI_GPMODE_CLKPIN |					//interface clock is output on a pin
			EPI_GPMODE_CLKGATE |				//clock is stopped when there is no transaction
//			EPI_GPMODE_FRAME50 |				//frame 50:50 - not using frame signal
//			EPI_GPMODE_WRITE2CYCLE |			//two cycle write - single cycle write
			EPI_GPMODE_ASIZE_4 |				//address bus size of 4 bits
			EPI_GPMODE_DSIZE_16,				//data bus size of 16 bits
    		0,									//frame 0
    		0);									//parameter not used
    EPIAddressMapSet(EPI0_BASE,
    		EPI_ADDR_PER_SIZE_256B |			//only 16 needed
			EPI_ADDR_PER_BASE_C);				//EPI0 is mapped from 0xC0000000 to 0xC00000FF.
} //initEPI()
//and to use the EPI....... //--------------------------------------------------------- uint16_t * EPIfpga = (uint16_t *)0xC0000000; uint16_t sr; //to read an fpga register... sr = EPIfpga[2]; //to write an fpga register... EPIfpga[2] = 0x2A27;

  • seems to have messed up my post!.....

    //and to use the EPI.......
    //---------------------------------------------------------
    uint16_t * EPIfpga = (uint16_t *)0xC0000000;
    uint16_t sr;

    //to read an fpga register...
    sr = EPIfpga[2];

    //to write an fpga register...
    EPIfpga[2] = 0x2A27;
  • Hi Richard,

    One of our experts on the EPI module will be getting back with you shortly.
  • Hello Richard

    I have a very similar configuration as you have except that I use

    EPIConfigGPModeSet(EPI0_BASE, (EPI_GPMODE_CLKPIN | EPI_GPMODE_CLKGATE |
    EPI_GPMODE_DSIZE_16 | EPI_GPMODE_ASIZE_12), 0, 0);

    //
    // Set the Address Map for Peripheral Address Space
    //
    EPIAddressMapSet(EPI0_BASE, EPI_ADDR_RAM_SIZE_64KB | EPI_ADDR_RAM_BASE_6);

    Can you try the same?

    Regards
    Amit
  • Hi Amit,

    Interestingly enough, with your settings above, A1 stays hi, but A0, A2 and A3 all behave correctly (on quick test - I haven't checked data).

    Do you know what's happening?

    regards,
    Richard
  • Hi Amit,

    Further tests show it is the EPI_GPMODE_ASIZE_4 that causes the problem, if I use ASIZE_12 with the rest the same as my first post, it works.

    But does this have any implications for pin assignments or other things?

    Regards
    Richard
  • Hello Richard

    No, it does not. The EPI pins if not configured will not affect the other functions on the pin

    Regards
    Amit
  • Thank you Amit - great service!
    Best regards
    Richard
  • I have discovered a misunderstanding! The address to pin mapping changes depending on address width, not data width.
    From the data sheet....
    In column 2 of Table 11-12. EPI General-Purpose Signal Connections, it very much appears as if a data width of 16 has A0 on EPIOS16, which is how I connected up my circuit. However above this in the text it says...
    4-bit address uses EPI0S[27:24];
    12-bit address uses EPI0S[27:16];
    20-bit address uses EPI0S[27:8];
    I now understand I should have used EPIOS 27..24 for my 4 address lines!
    It would be really good if the pinmux utility could deal with this.

    My question is can I just carry on with the connections I have for A3..A0 (EPIOS19..16) and setting address width to 12? Tests suggest this isn't working right.
  • Hello Richard

    Datawidth of 16 and address with of 12 should work as I am using the same

    Regards
    Amit