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TM4C - EPI General Purpose Read loop variable time

Hi, 

I used to work with the EPI bus in HB16 mode but I would like to try the General Purpose mode to gain speed between FPGA and TM4C.

Here's the EPI configuration:

volatile unsigned short * epiFPGA  = (unsigned short *)0xA0000000;

#define EPI_PORTA_PINS          GPIO_PIN_7 | GPIO_PIN_6 //

#define EPI_PORTB_PINS          GPIO_PIN_3 | GPIO_PIN_2 //

#define EPI_PORTC_PINS          GPIO_PIN_7 | GPIO_PIN_6 | GPIO_PIN_5 | GPIO_PIN_4 //

#define EPI_PORTD_PINS          0x00     //

#define EPI_PORTE_PINS          0x00     //

#define EPI_PORTF_PINS          0x00     //

#define EPI_PORTG_PINS          GPIO_PIN_1 | GPIO_PIN_0                //

#define EPI_PORTH_PINS          GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0                //

#define EPI_PORTJ_PINS          0x00

#define EPI_PORTK_PINS          GPIO_PIN_5

#define EPI_PORTL_PINS          GPIO_PIN_4 | GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0         //

#define EPI_PORTM_PINS          GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0                //

#define EPI_PORTP_PINS          GPIO_PIN_3 | GPIO_PIN_2 //

EPI_Init()

{

ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);

 

ROM_GPIOPinConfigure(GPIO_PA6_EPI0S8);

ROM_GPIOPinConfigure(GPIO_PA7_EPI0S9);

GPIOPinTypeEPI(GPIO_PORTA_BASE, EPI_PORTA_PINS);

 

ROM_GPIOPinConfigure(GPIO_PB2_EPI0S27);

ROM_GPIOPinConfigure(GPIO_PB3_EPI0S28);

GPIOPinTypeEPI(GPIO_PORTB_BASE, EPI_PORTB_PINS);

 

ROM_GPIOPinConfigure(GPIO_PC4_EPI0S7);

ROM_GPIOPinConfigure(GPIO_PC5_EPI0S6);

ROM_GPIOPinConfigure(GPIO_PC6_EPI0S5);

ROM_GPIOPinConfigure(GPIO_PC7_EPI0S4);

GPIOPinTypeEPI(GPIO_PORTC_BASE, EPI_PORTC_PINS);

 

ROM_GPIOPinConfigure(GPIO_PG0_EPI0S11);

ROM_GPIOPinConfigure(GPIO_PG1_EPI0S10);

GPIOPinTypeEPI(GPIO_PORTG_BASE, EPI_PORTG_PINS);

 

ROM_GPIOPinConfigure(GPIO_PH0_EPI0S0);

ROM_GPIOPinConfigure(GPIO_PH1_EPI0S1);

ROM_GPIOPinConfigure(GPIO_PH2_EPI0S2);

ROM_GPIOPinConfigure(GPIO_PH3_EPI0S3);

GPIOPinTypeEPI(GPIO_PORTH_BASE, EPI_PORTH_PINS);

 

ROM_GPIOPinConfigure(GPIO_PK5_EPI0S31);

GPIOPinTypeEPI(GPIO_PORTK_BASE, EPI_PORTK_PINS);

 

ROM_GPIOPinConfigure(GPIO_PL0_EPI0S16);

ROM_GPIOPinConfigure(GPIO_PL1_EPI0S17);

ROM_GPIOPinConfigure(GPIO_PL2_EPI0S18);

ROM_GPIOPinConfigure(GPIO_PL3_EPI0S19);

ROM_GPIOPinConfigure(GPIO_PL4_EPI0S26);

GPIOPinTypeEPI(GPIO_PORTL_BASE, EPI_PORTL_PINS);

 

ROM_GPIOPinConfigure(GPIO_PM0_EPI0S15);

ROM_GPIOPinConfigure(GPIO_PM1_EPI0S14);

ROM_GPIOPinConfigure(GPIO_PM2_EPI0S13);

ROM_GPIOPinConfigure(GPIO_PM3_EPI0S12);

GPIOPinTypeEPI(GPIO_PORTM_BASE, EPI_PORTM_PINS);

 

ROM_GPIOPinConfigure(GPIO_PP2_EPI0S29);

ROM_GPIOPinConfigure(GPIO_PP3_EPI0S30);

GPIOPinTypeEPI(GPIO_PORTP_BASE, EPI_PORTP_PINS);

 

// General Purpose Init

ROM_EPIDividerSet(EPI0_BASE, 0x00010001);                     // 1/2 (System) = 120MHz * 0.5 = 60MHz

ROM_EPIModeSet(EPI0_BASE, EPI_MODE_GENERAL);        // General Purpose

ROM_EPIConfigGPModeSet(EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_ASIZE_12 | EPI_GPMODE_DSIZE_16, 1, 1);

ROM_EPIAddressMapSet(EPI0_BASE, EPI_ADDR_PER_SIZE_16MB | EPI_ADDR_PER_BASE_A);

}

Then in the main loop, I access the EPI data in a "for" loop :

#define FPGA_PORT             epiFPGA[0x11]

g_sBuffer[0] = 0;

for (i= 1; i<20;i++)  // Fill up with incrementing data

g_sBuffer[i] = (g_sBuffer[i-1] +1);

for (i= 0; i<20;i++)   // Write it to the FPGA

FPGA_PORT = g_sBuffer[i];

There is probably something I am missing in the config but the  Write frequency is somewhat slower than I expected. The time between reads varies from 800ns to 1.7us. The printscreen shows what I mean, first signal is EPI Data 0 and is toggled every write (that works)...:

EPI clock runs properly at 60MHz, there are really some long delays between Writes (or reads, have the same effect) that I cannot explain.

I disabled interrupts and it didn't change anything. By default should be the "Ready" signal disabled so I don't see what could be delaying Read or Write between each "for" cycle.

Thanks in advance for your help!

asdasdasdasd#define DTI_STATUS             epiFPGA[0x11]

  • Hello Frederic,

    For the configuration setting it would be worthwhile taking a register dump of EPI to begin with.

    Regards
    Amit
  • Hello Amit,

    Sorry, I haven't thought of checking the EPI Dump... This is just before jumping in my "for" loop. Everything looks like I initialized.

    EPI0_EPI_CFG         0x0000000B 0x00000010

    EPI0_EPI_BAUD        0x0000000B 0x00010001

    EPI0_EPI_BAUD2       0x0000000B 0x00000000

    EPI0_EPI_HB16CFG     0x0000000B 0x80000021

    EPI0_EPI_GPCFG       0x0000000B 0x80000021

    EPI0_EPI_SDRAMCFG    0x0000000B 0x80000021

    EPI0_EPI_HB8CFG      0x0000000B 0x80000021

    EPI0_EPI_HB8CFG2     0x0000000B 0x00000000

    EPI0_EPI_HB16CFG2    0x0000000B 0x00000000

    EPI0_EPI_ADDRMAP     0x0000000B 0x00000010

    EPI0_EPI_RSIZE0      0x0000000B 0x00000003

    EPI0_EPI_RADDR0      0x0000000B 0x00000000

    EPI0_EPI_RPSTD0      0x0000000B 0x00000000

    EPI0_EPI_RSIZE1      0x0000000B 0x00000003

    EPI0_EPI_RADDR1      0x0000000B 0x00000000

    EPI0_EPI_RPSTD1      0x0000000B 0x00000000

    EPI0_EPI_STAT        0x0000000B 0x00000000

    EPI0_EPI_RFIFOCNT    0x0000000B 0x00000000

    EPI0_EPI_READFIFO0   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO1   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO2   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO3   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO4   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO5   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO6   0x0000000B 0x064A0660

    EPI0_EPI_READFIFO7   0x0000000B 0x064A0660

    EPI0_EPI_FIFOLVL     0x0000000B 0x00000033

    EPI0_EPI_WFIFOCNT    0x0000000B 0x00000004

    EPI0_EPI_DMATXCNT    0x0000000B 0x00000000

    EPI0_EPI_IM          0x0000000B 0x00000000

    EPI0_EPI_RIS         0x0000000B 0x00000004

    EPI0_EPI_MIS         0x0000000B 0x00000000

    EPI0_EPI_EISC        0x0000000B 0x00000000

    EPI0_EPI_HB8CFG3     0x0000000B 0x00080000

    EPI0_EPI_HB16CFG3    0x0000000B 0x00080000

    EPI0_EPI_HB16CFG4    0x0000000B 0x00080000

    EPI0_EPI_HB8CFG4     0x0000000B 0x00080000

    EPI0_EPI_HB8TIME     0x0000000B 0x00022000

    EPI0_EPI_HB16TIME    0x0000000B 0x00022000

    EPI0_EPI_HB8TIME2    0x0000000B 0x00022000

    EPI0_EPI_HB16TIME2   0x0000000B 0x00022000

    EPI0_EPI_HB16TIME3   0x0000000B 0x00022000

    EPI0_EPI_HB8TIME3    0x0000000B 0x00022000

    EPI0_EPI_HB8TIME4    0x0000000B 0x00022000

    EPI0_EPI_HB16TIME4   0x0000000B 0x00022000

    EPI0_EPI_HBPSRAM     0x0000000B 0x00000000

    I tried turning disabling all interrupts with ROM_IntMasterDisable();

    The timing is then somewhat more constant but is then still "blocked" at ~250ns per WRITE cycle

    Thank you for your Help Amit,

    Frederic

  • Hello Frederic

    Since the code you have given is partial, can you send me the complete C file for EPI that I can run on my setup. Note that at 120MHz the code execution of the CPU to write and read and the EPI Transaction time would have an effect on the actual time between two consecutive EPI operations.

    Regards
    Amit
  • Hello again Amit, thanks again for your help. I've grown quite curious to know what I am doing wrong.

    Here is the main.c, and pinout.c and pinout.h

    As you'll see, I started from the enet_io example and built up from there.

    I believe the 120MHz has an impact on the execution speed of the Read-Writes but the fact that it's quite close to the read-write speed (~200ns) I had with the HB16 makes me wonder if some settings are wrong. Like some Wait-States could be activated although from what I understood, they are not taken into account when using GP Mode. I will test tomorrow morning with the EPI_GPMODE_CLKGATE flag and see how long is EPI_CLK activated.

    Code.zipThanks you,

    Frederic

  • Hello Frederic,

    Let me go through the code base and hopefully should have something for you.

    Regards
    Amit
  • Hello Frederic

    I ran a simplified code as follows

    EPIDividerSet(EPI0_BASE, 0x00010001); // 1/2 (System) = 120MHz * 0.5 = 60MHz
    EPIModeSet(EPI0_BASE, EPI_MODE_GENERAL); // General Purpose
    EPIConfigGPModeSet(EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_ASIZE_12 | EPI_GPMODE_DSIZE_16, 0, 0);
    EPIAddressMapSet(EPI0_BASE, EPI_ADDR_PER_SIZE_256B | EPI_ADDR_PER_BASE_A);

    // Write dummy values in buffer
    uiTestArray[0] = 0;
    for (i = 1; i < 20; i++)
    uiTestArray[i] = uiTestArray[i-1] +1;

    // Write to FPGA in a loop
    for (i = 0; i < 20; i++)
    FPGA_PORT_16 = uiTestArray[i];

    and I see that a write operation takes 50ns-66ns

    Regards
    Amit
  • Hi Amit,

    I tried removing all "ROM_" prefixes in these functions to simplify the code but it hasn't changed anything. Then I tried starting a new blank project with the same initialization code but without any extra peripherals. Sure enough it worked as you stated... Only difference was not in the code I wrote in my original project but in the compiler settings. I had turned off the Optimization since I had problems with debugging and read that turning optimizations OFF for debugging gave better results. With Global Optimizations(2) my project now works with 50~60ns period for writes and 100ns for reads. Will test later with µDMA but I am sure now it'll be ok.

    Thanks again for your help and I am sorry for making you search a problem where there was none! At least next time someone reports a "delay problem" you'll have another place where to suggest looking.

    Have a nice day,

    Frederic

  • Hello Frederic,

    No problems about that. By default I run all programs with optimization set to "2". So I would have to thank you to have found the actual cause of the issue.

    Regards
    Amit