TMS570LS3137: TMS570LS3137 checkRAMECC double bit error verification

Hi All,

i have doubt regarding verification of double bit ecc error generated in checkRAMECC API code generated by HALCOGEN version 4.7. Below is the code section from checkRAMECC:

/* Force a double bit error in both the banks */
_coreDisableRamEcc_();
tcramA2bitError ^= 3U;
tcramB2bitError ^= 3U;
_coreEnableRamEcc_();

/* Read the corrupted data to generate double bit error */
ramread = tcramA2bit;
ramread = tcramB2bit;

regread = tcram1REG->RAMUERRADDR;
regread = tcram2REG->RAMUERRADDR;

How is the code verifying tha double bit error is generated?

Thanks,

Kalyan