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Frequent questions

  • [FAQ] TMS570LC4357: How to solve the cache coherency issues when accessing the shared memory through CPU and DMA?

    Part Number: TMS570LC4357 After CPU has updated the data buffer, but the DMA still transfers the old content in the buffer instead of the updated one.

  • [FAQ] TMS570LC4357: FEE Configuration Parameters in HALCOGen

    Part Number: TMS570LC4357 Other Parts Discussed in Thread: HALCOGEN , To generate FEE drivers from Halcogen software I had some questions about the highlighted parameters shown in images below. I read the Technical Reference Manual of TMS570LC4357 but…

  • [FAQ] Flash Programming Options in Mass Production Phase

    What is the recommended production method of loading an flash device during mass production?

  • [FAQ] TMS570LS1224: When reading from Flash ECC space or SRAM ECC space, does a double-bit error detected generate data abort?

    Part Number: TMS570LS1224 The Hercules microcontrollers protect all accesses to the on-chip flash memory and on-chip SRAM memory by dedicated Single-Error-Correction-Double-Error-Detection (SECDED) logic. The access to the program memory (bank 0 or bank…

  • [FAQ] TMS570LC4357: After erasing, the flash contents should become 0xFFFFFFFF. Why the flash content in CCS memory browser is not 0xFFFFFFFF?

    Part Number: TMS570LC4357 After the flash is erased, why the flash content doesn't become 0xFFFFFFFF?

  • [FAQ] TMS570LC4357: There are three instances of temperature sensors in this MCU, how to configure the pin multiplexing (pinmux) to select ADC pins for those temperature sensors?

    Part Number: TMS570LC4357 1. How to enable those three temperature sensors? 2. Can the temperature sensor be used to measure the room temperature? 3. How to configure the pin multiplexing to select AD1IN[31] for the temperature sensor 1? 4. How…

  • [FAQ] TMS570LC4357: How to use DMA for CAN message transmit and receive?

    Part Number: TMS570LC4357 The CAN module has three message interface registers: IF1, IF2 and IF3. How can I enable DMA to transfer message to IF1 of IF2 data registers and from IF3x data registers?

  • [FAQ] MCU-PLUS-SDK-AM243X: System reset is needed for ENET(ICSSG/CPSW) based examples

    Part Number: MCU-PLUS-SDK-AM243X In case of enet_lwip_icssg and enet_lwip_cpsw examples(inclusive of other CPSW and ICSSG examples also): We see assert when we try to run example again after doing CPU reset in CCS, why is it the case?

  • [FAQ] AM2732-Q1: How to create custom Target configurations (like MCAL) and load compiled binaries to the SoC?

    I have compiled my CCS projects / MCAL libraries & examples and have binaries with me, how should I be loading or testing them on my board?

  • [FAQ] What are the TI deliverables for security in MCU+ devices ?

    Other Parts Discussed in Thread: SYSCONFIG Q1 : Does TI devices support hardware accelerators ? Q2 : What type of supports are present in the hardware ? Q3. How does application core interact with security core ? Q4. What are different configuration…

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