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Original question:

MSP430F6779A: What happens to EMDC after a long period of interrupt disabling?

MSP430F6779A: Maximum disable interrupt time allowed by the EMDC.

TinK
Intellectual 795 points
Part Number: MSP430F6779A

Hello,

I would like to confirm about Maximum disable interrupt time allowed by the EMDC.

EMDC Version: Energy Measurement Design Center version 1_30_00_00

Sampling Frequency (Hz): 4096
Oversampling Rate (OSR): 256
SMCLK Frequency (Hz): 25165824
AC Main Frequency (Hz): 60
Number of Voltage Sensors: 1
Number of Current Sensors: 2

My assumption,

The maximum disable interrupt time allowed by the EMDC will be

= (1 / 4096 Hz) - total processing time on SD24BISR.

= 139.14 micro second (value from experiment)

Correct or not?

  • 0
    TI__Mastermind 23450 points

    Hi Tink,

    What is the purpose you are trying to achieve with this?

    You can disable the interrupts for however long you would like but missing interrupts could cause issues with data transfer. If you disable interrupts just looking at the ADC side then you could miss a UART request from the accompanying GUI. Otherwise if your timing is off with the ADC interrupt you would miss the trigger for when conversion finishes. But, if you want to focus on only the ADC then you could do the sampling + conversion time and I recommend enabling the interrupt earlier than the total time for the ADC process.

    Regards,

    Luke

  • 0 in reply to Luke Ledbetter
    Intellectual 795 points

    Hello Luke,

    Thank you for information.

    In our application sometimes need disable interrupt in main loop program for prevention about sharing data problem between main loop and interrupt and when change configure about critical registers.

    So we would like to know maximum value of disable interrupt that the EMDC still operates normally.

    Timing below correct not (in main loop disable interrupt shall not more than 139.14 us to let the next interrupt of ADC occurs in time).

  • 0 in reply to TinK
    TI__Mastermind 23450 points

    Hi Tink,

    Based on the Implementation of a Three-Phase Electronic Watt-Hour Meter Using MSP430F677x the ADC interrupts would fire based on the sampling frequency (4096). The background process is the section that I advise against adjusting and would try to avoid messing with the timing. 

    Instead of disabling interrupts would it be better to lock these changes with booleans instead? It looks like you don't want to run into a race condition where the background process would change/use the registers. I would have a flag that I check before changing these critical registers to let me know if I'm in a process. For example, right after the ADC start conversion call you can set a boolean to True, then after the conversion is done you can set that same boolean to false. Then when you want to change the critical register/variable you can check your flag ahead of time to see if the variable is in use. 

    Essentially semaphore to lock the register/variable from getting changed.

    Regards,

    Luke

  • 0 in reply to Luke Ledbetter
    Intellectual 795 points

    Hi Luke,

    Thank for advice.

    However, we still disable interrupt for prevention (cannot change method now).

    So, we have to make sure that the EMDC will operate correctly when the code in main loop disable interrupt <= 139.14 us. that right?

  • 0 in reply to TinK
    TI__Mastermind 23450 points

    Hi Tink,

    139.14 us is less than the 4096 interrupts/sec, so if interrupts are disabled after the ADC starts conversion and reenabled after the 139.14us, it shouldn't cause any interference with the ADC samples. But I can't give a guarantee that the library will fully work as it is out of the bounds of the testing we have done. I recommend doing thorough testing with this implementation to know if it satisfies your application requirements.

    Regards,

    Luke

  • 0 in reply to Luke Ledbetter
    Intellectual 795 points

    Hi Luke,

    Thank you.

    It means we may disable interrupt up to 244.14 us (1/4096 Hz) right?

  • 0 in reply to TinK
    TI__Mastermind 23450 points

    Hi Tink,

    That would be the maximum time for the ADC to not miss a trigger, I'd give a couple clock cycles for any variance. Of course, this doesn't take into account other interrupts like UART. Again, I do recommend testing the disable time to guarantee it fits the process flow you are aiming for.

    Regards,

    Luke

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