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MSP430F6747A: SD24_B voltage per bit in offset binary mode

Part Number: MSP430F6747A

I am having trouble determining the volts per bit for the SD24_B when it is in offset binary mode.

In Table 29-3 (pg 771) of the MSP430 user guide, the first row shows:

+V_FSR = 0x00FF FFFF

0 V = 0x0080 0000

-V_FSR = 0x0000 0000

In this case, there is one additional bit in the negative direction compared to the positive direction (i.e., 8,388,608 bits in the negative direction vs 8,388,607 bits in the positive direction)

How is the volts per bit calculated in this case?

Here are three possible options:

  1. Vref / 8,388,608
  2. Vref / 8,388,607
  3. 2*Vref / (8,388,608 + 8,388,607)

Thanks.

  • Hi, 

    The volts per bit should not influence by whether it is offset mode or not. So, the results should be 2*Vref/2^24 = Vref / 8,388,608

    Best regards,

    Cash Hao

  • Thanks Cash, that makes sense but there still seems to be a discrepancy with this calculation and the first row of Table 29-3. I believe it is due to the binary offset value not being exactly centered between the max and min when in offset binary mode.  

    For example, if Vref = 1.2V, then V_per_bit = 143.051nV

    In the first row of Table 29-3, if the 0 V value of 0x0080 0000 (8,388,608) is subtracted from the filter outputs we are left with the following values:

    +Vfsr = 8,388,607

    0 V = 0

    -Vfsr = 8,388,608

    Then multiplying these values by the V_per_bit gives

    +Vfsr = 8,388,607 * 143.051nV = 1.199999856 (exactly one bit away from 1.2V)

    0 V = 0 * 0.143V = 0 V

    -Vfsr = -8,388,608 * 0.143uV = exactly -1.2 V

    So, given this, is it correct that in offset binary mode, the max value is actually one bit less than +Vfsr, not exactly +Vfsr?

    Thanks,

    Mark

  • Hi,

    So, given this, is it correct that in offset binary mode, the max value is actually one bit less than +Vfsr, not exactly +Vfsr?

    Yes, I think this is correct.

    Best regards,

    Cash Hao

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