This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP430F2272 Delay on interrupt

Hi,

I am writing a application where i need to switch on a transistor syncron with a puls pattern.

Every time the puls switch fra high to low i got an interrupt. This interrupt switch on the transistor.

P2.0 is input for puls (interrupt H->L)

P3.0 is output for transistor.

Sometimes the output for the transistor is switched on syncron with the puls as it must, but sometimes the transistor is switch on later (between 1ms and 9ms later) then the puls. Also not syncron.

Does anyone have an idea if there can be a delay in the P2.0 interrupt?

 

  • Svend Clausen said:
    Does anyone have an idea if there can be a delay in the P2.0 interrupt

    The P2 interrupt has the second.-lowest interrupt priority of all. So if you're wasting time in any other ISR (I've seen people sending complete books with 2400Bd inside an ISR, wondering why the rest of the code is frozen for ages), the P2 ISR won't get called until the higher priority ISRs are done.
    9ms is really much, unless your MSP runs on 12kHz system speed :)

  • Hi,

    Can it be that the delay for 25ms in Interrupt rutine for P1.1 can delay the interrupt reaction time for interrupt P2.0.

    Interrupt on P2.0 switch output on P3.0 ON.

    Please see attached pdf file for timming diagram.

    7077.Delay on interrupt.pdf

     

    KR

    Svend

  • Svend Clausen said:
    Can it be that the delay for 25ms in Interrupt rutine for P1.1 can delay the interrupt reaction time for interrupt P2.0.

    No, it will be! Unless you use the highly dangerous method of interrupt nesting, an ISR cannot be interrupted by a different interrupt, regardless of priorities. Once an ISR is entered, it will execute uninterrupted until it exits.

    So first priority rule for any ISR is: do not idle around inside an ISR. "Fast-in, fast-out" is the reason for the existence of ISRs. If an interrupt has to do time-consuming work, let the ISR set a flag and the work is then done in main. Or don't use an ISR at all for this job but rather check for the interrupt flag in main by polling.

    Having a delay of 25ms inside the port 1 ISR means that with only 40 port interrupts per second, the processor is 100% busy. A total mess! Usign ISRs is not to be confused with multithreading.

  • Hi,

    thank you very much for the detailed and helpful explanation.

    KR.

    Svend

**Attention** This is a public forum